Patents by Inventor Vijay Nagasamy

Vijay Nagasamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210232812
    Abstract: A training system for a neural network system and method of training is disclosed. The method may comprise: receiving, from a sensor, an image frame captured while an operator is controlling a vehicle; using an eye-tracking system associated with the sensor, monitoring the eyes of the operator to determine eyeball gaze data; determining, from the image frame, a plurality of pedestrians; and iteratively training the neural network system to determine, from among the plurality of pedestrians, the one or more target pedestrians using the eyeball gaze data and an answer dataset that is based on the eyeball gaze data, wherein the determined one or more target pedestrians have a relatively-higher probability of collision with the vehicle than a remainder of the plurality of pedestrians.
    Type: Application
    Filed: January 27, 2020
    Publication date: July 29, 2021
    Applicant: Ford Global Technologies, LLC
    Inventors: Nikita Jaipuria, Aniruddh Ravindran, Hitha Revalla, Vijay Nagasamy
  • Publication number: 20210213958
    Abstract: Embodiments describe a vehicle configured with a brain machine interface (BMI) for a vehicle computing system to control vehicle functions using electrical impulses from motor cortex activity in a user's brain. A BMI training system trains the BMI device to interpret neural data generated by a motor cortex of a user and correlate the neural data to a vehicle control command associated with a neural gesture emulation function. A BMI system onboard the vehicle may receive a neural data feed of neural data from the user using the trained BMI device, determine, a user intention for a control instruction to control a vehicle infotainment system using the neural data feed, and perform an action based on the control instruction. The vehicle may further include a headrest configured as a Human Machine Interface (HMI) device that reads the electrical impulses without invasive electrode connectivity.
    Type: Application
    Filed: January 13, 2020
    Publication date: July 15, 2021
    Applicant: Ford Global Technologies, LLC
    Inventors: Ali Hassani, Aniruddh Ravindran, Vijay Nagasamy
  • Patent number: 10829046
    Abstract: A method for training an image-based trailer identification system comprises capturing a plurality of captured images in a field of view and identifying a detected trailer angle for a trailer in connection with a vehicle in each of the captured images. The method further comprises comparing the captured images and the corresponding trailer angles to a predetermined image set comprising a plurality of teaching trailer angles and identifying at least one required trailer angle of the teaching trailer angles that is not included in the captured images. Based on the captured images, a simulated angle image is generated. The simulated image comprises a depiction of the trailer in connection with the vehicle at the at least one required angle not included in the captured images. The method further comprises supplying the simulated angle image to the identification system for training.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: November 10, 2020
    Assignee: Ford Global Technologies, LLC
    Inventor: Vijay Nagasamy
  • Publication number: 20200282910
    Abstract: A method for training an image-based trailer identification system comprises capturing a plurality of captured images in a field of view and identifying a detected trailer angle for a trailer in connection with a vehicle in each of the captured images. The method further comprises comparing the captured images and the corresponding trailer angles to a predetermined image set comprising a plurality of teaching trailer angles and identifying at least one required trailer angle of the teaching trailer angles that is not included in the captured images. Based on the captured images, a simulated angle image is generated. The simulated image comprises a depiction of the trailer in connection with the vehicle at the at least one required angle not included in the captured images. The method further comprises supplying the simulated angle image to the identification system for training.
    Type: Application
    Filed: March 6, 2019
    Publication date: September 10, 2020
    Applicant: Ford Global Technologies, LLC
    Inventor: Vijay Nagasamy
  • Publication number: 20200164803
    Abstract: A trailer angle identification system comprises an imaging device configured to capture an image. An angle sensor is configured to measure a first angle of the trailer relative to a vehicle. A controller is configured to process the image in a neural network and estimate a second angle of the trailer relative to the vehicle based on the image. The controller is further configured to train the neural network based on a difference between the first angle and the second angle.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 28, 2020
    Applicant: Ford Global Technologies, LLC
    Inventors: Bruno Sielly Jales Costa, Vidya Nariyambut Murali, Saeid Nooshabadi, Vijay Nagasamy
  • Patent number: 6324678
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: August 22, 1996
    Date of Patent: November 27, 2001
    Assignee: LSI Logic Corporation
    Inventors: Carlos Dangelo, Richard Deeley, Vijay Nagasamy, Manoucher Vafai
  • Patent number: 6169958
    Abstract: Systems and methods are disclosed for ionospheric correction in a system employing a single GPS frequency receiver for determining the geographic location of an object on the earth's surface. The receiver receives signals transmitted at the GPS L1 frequency from at least first, second and third GPS satellites, the first, second and third satellites having respective orbital positions relative to the receiver such that the total electron count (TEC) contribution to ionoshperic interference to signals transmitted by the respective satellites and received by the receiver is approximately the same. Respective measured distances of the three satellites to the receiver are determined based on the actual signal transmission times. True distances of the respective satellites are then calculated based on the assumption that the TEC contribution to the interference from each satellite is approximately the same.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: January 2, 2001
    Assignee: VSIS, Inc.
    Inventors: Vijay Nagasamy, Mohammad Usman, James Sun
  • Patent number: 6163295
    Abstract: Systems and methods are disclosed for ionospheric correction in a system employing a single GPS frequency receiver for determining the geographic location of an object on the earth's surface. The receiver receives signals transmitted at the GPS L.sub.1 frequency from at least first and second GPS satellites, the first and second satellites having respective orbital positions relative to the receiver such that the total electron count (TEC) contribution to ionoshperic interference to signals transmitted by the respective satellites and received by the receiver is approximately the same. Respective measured distances of the two satellites to the receiver are determined based on the actual signal transmission times. True distances of the respective satellites are then calculated based on the assumption that the TEC contribution to the interference from each satellite is approximately the same.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: December 19, 2000
    Assignee: VSIS, Inc.
    Inventors: Vijay Nagasamy, Mohammad Usman, James Sun
  • Patent number: 5910897
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a-high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: June 8, 1999
    Assignee: LSI Logic Corporation
    Inventors: Carlos Dangelo, Vijay Nagasamy
  • Patent number: 5907494
    Abstract: A machine-independent operating environment, method and storage medium embodying machine-code usable by a computer system for exchanging design information between a plurality of computer-aided design tools. A set of data format objects are provided for exchanging the design information between each computer aided-design tool. An accessing method is provided for enabling each computer-aided design tool to store the design information into and retrieve the design information from an associated data format object. An archiving method is provided for enabling the computer system to write the data format objects storing the design information onto and read the data format objects storing the design information from a storage device interconnected with the computer system using each associated data format object. Preferably, each computer-aided design tool is expressed in machine-portable object code which is executed by a virtual machine on the computer system.
    Type: Grant
    Filed: November 22, 1996
    Date of Patent: May 25, 1999
    Assignee: LSI Logic Corporation
    Inventors: J. Carlos Dangelo, Vijay Nagasamy
  • Patent number: 5870308
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: February 9, 1999
    Assignee: LSI Logic Corporation
    Inventors: Carlos Dangelo, Vijay Nagasamy, Vijayanand Ponukumati
  • Patent number: 5572436
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications using a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: June 2, 1994
    Date of Patent: November 5, 1996
    Assignee: LSI Logic Corporation
    Inventors: Carlos Dangelo, Vijay Nagasamy, Vijayanand Ponukumati
  • Patent number: 5557531
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: June 14, 1993
    Date of Patent: September 17, 1996
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, Carlos Dangelo, Vijay Nagasamy
  • Patent number: 5553002
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications using a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: June 14, 1993
    Date of Patent: September 3, 1996
    Assignee: LSI Logic Corporation
    Inventors: Carlos Dangelo, Richard Deeley, Vijay Nagasamy, Manoucher Vafai
  • Patent number: 5544066
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications using a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: June 14, 1993
    Date of Patent: August 6, 1996
    Assignee: LSI Logic Corporation
    Inventors: Michael D. Rostoker, Carlos Dangelo, Vijay Nagasamy, Doron Mintz
  • Patent number: 5493508
    Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: February 20, 1996
    Assignee: LSI Logic Corporation
    Inventors: Carlos Dangelo, Vijay Nagasamy