Patents by Inventor Vijay Phadke

Vijay Phadke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7616464
    Abstract: A reverse current control system for first power converter having a synchronous rectifier and an output inductance includes a reverse current module. The reverse current module monitors a first voltage that is based on an output voltage of the output inductance and a second voltage that is based on an input voltage of the output inductance. The reverse current module anticipates a reverse current condition based on the first and second voltages. When the reverse current condition exists, the reverse current module prevents current from flowing in reverse through the power converter.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: November 10, 2009
    Assignee: Astec International Limited
    Inventors: Vijay Phadke, James Sigamani
  • Patent number: 7596007
    Abstract: A multiphase DC to DC converter includes an input, an output, at least first and second converters, an inductor, an output capacitor, and a drive circuit. The drive circuit is configured for switching the first and second converters with a predetermined phase shift therebetween. The output capacitor is operatively coupled between the first and second converters and the output. The inductor can be placed either at the input side or the output side. When placed at the input side, the inductor is operatively coupled between an input capacitor and the first and second converters. When placed at the output side, the inductor is operatively coupled between the first and second converters and the output capacitor. The multiphase DC to DC converter is capable of achieving lossless switching transitions and negligible ripple current in the output capacitor.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: September 29, 2009
    Assignee: Astec International Limited
    Inventors: Vijay Phadke, James Sigamani, Israel Beltran
  • Publication number: 20090153111
    Abstract: A switching power converter has at least one electronic power switch. To minimize switching losses and optimize efficiency, the gate drive voltage level used to drive the electronic power switch is optimized. In an aspect, a digital controller generates optimizes the gate drive voltage using efficiency optimization algorithms, which in an aspect are programmed in the digital controller. In accordance with an aspect of the present disclosure, the switching power supply has at least two electronic power switches coupled in parallel. Optimization algorithms are used to determine the optimum number of switched electronic power switches that are actively being switched at a given time in order to achieve optimized efficiency for condition changes, such as input voltage variation, load and environmental temperature changes. In an aspect, the algorithms are programmed in a digital controller chip.
    Type: Application
    Filed: December 14, 2007
    Publication date: June 18, 2009
    Applicant: Astec International Limited
    Inventors: Hong Mao, Geof Potter, Vijay Phadke, Gordon Currie, Arlaindo V. Asuncion
  • Publication number: 20090073731
    Abstract: A method for detecting a performance degradation of a fan in a power converter is disclosed. The method includes monitoring a speed of the fan and detecting the performance degradation of the fan based, at least in part, on the monitored speed. The method further includes generating a warning signal after detecting the performance degradation of the fan. According to another aspect, a power converter includes a fan and a processor operably coupled to the fan for monitoring a speed of the fan. The processor is configured for detecting a performance degradation of the fan based, at least in part, on the monitored fan speed. The processor generates a warning signal after detecting the performance degradation of the fan.
    Type: Application
    Filed: September 14, 2007
    Publication date: March 19, 2009
    Inventors: Vijay Phadke, Gordon Currie, Arlaindo Asuncion
  • Patent number: 7499299
    Abstract: A circuit for controlling the operation of synchronous rectifiers. The circuit delays the turn-off of the synchronous rectifiers in accordance with the load current. The magnitude of the load current is examined to determine which of a plurality of delay elements is selected to delay turn-off of the synchronous rectifiers. Delay is accomplished by holding up for a predetermined time period one of a plurality of control signals utilized to determine when the synchronous rectifier should be turned-off.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: March 3, 2009
    Assignee: Astec International Limited
    Inventors: Vijay Phadke, Arlaindo Vitug Asuncion, Richard Daniel Cabbab Caubang
  • Publication number: 20080285192
    Abstract: A power converter includes a controller having at least one input for monitoring a rate of change of an operating parameter of the power converter. The controller is configured for comparing the monitored rate of change of the operating parameter with an allowable rate of change for the operating parameter, and for generating a fault signal when the monitored rate of change of the operating parameter deviates from the allowable rate of change for the operating parameter. The operating parameter for which the rate of change is monitored may be, for example, a temperature, a current and/or a voltage in the power converter.
    Type: Application
    Filed: May 15, 2007
    Publication date: November 20, 2008
    Inventors: Vijay Phadke, Gordon Currie, Arlaindo Asuncion
  • Publication number: 20080284449
    Abstract: A power converter includes a controller and at least one circuit component. The controller is configured for monitoring stress on the circuit component during operation of the power converter and estimating a remaining life of the circuit component based on the monitored stress.
    Type: Application
    Filed: May 15, 2007
    Publication date: November 20, 2008
    Inventors: Vijay Phadke, Gordon Currie, Arlaindo Asuncion
  • Publication number: 20080285184
    Abstract: A power converter includes a controller and at least one output terminal for providing an output voltage and an output current to a load. The controller is configured for monitoring the output voltage and the output current and calculating an efficiency of the power converter based on the monitored output voltage and output current. The controller is also configured to generate a fault signal after detecting a degradation in the power converter efficiency.
    Type: Application
    Filed: May 15, 2007
    Publication date: November 20, 2008
    Inventors: Vijay Phadke, Gordon Currie, Arlaindo Asuncion
  • Publication number: 20080031027
    Abstract: A circuit for controlling the operation of synchronous rectifiers. The circuit delays the turn-off of the synchronous rectifiers in accordance with the load current. The magnitude of the load current is examined to determine which of a plurality of delay elements is selected to delay turn-off of the synchronous rectifiers. Delay is accomplished by holding up for a predetermined time period one of a plurality of control signals utilized to determine when the synchronous rectifier should be turned-off.
    Type: Application
    Filed: August 27, 2007
    Publication date: February 7, 2008
    Applicant: ASTEC INTERNATIONAL LIMITED
    Inventors: Vijay Phadke, Arlaindo Asuncion, Richard Caubang
  • Publication number: 20070086224
    Abstract: A multiphase DC to DC converter includes an input, an output, at least first and second converters, an inductor, an output capacitor, and a drive circuit. The drive circuit is configured for switching the first and second converters with a predetermined phase shift therebetween. The output capacitor is operatively coupled between the first and second converters and the output. The inductor can be placed either at the input side or the output side. When placed at the input side, the inductor is operatively coupled between an input capacitor and the first and second converters. When placed at the output side, the inductor is operatively coupled between the first and second converters and the output capacitor. The multiphase DC to DC converter is capable of achieving lossless switching transitions and negligible ripple current in the output capacitor.
    Type: Application
    Filed: October 13, 2006
    Publication date: April 19, 2007
    Inventors: Vijay Phadke, James Sigamani, Israel Beltran
  • Publication number: 20070041221
    Abstract: A reverse current control system for first power converter having a synchronous rectifier and an output inductance includes a reverse current module. The reverse current module monitors a first voltage that is based on an output voltage of the output inductance and a second voltage that is based on an input voltage of the output inductance. The reverse current module anticipates a reverse current condition based on the first and second voltages. When the reverse current condition exists, the reverse current module prevents current from flowing in reverse through the power converter.
    Type: Application
    Filed: August 16, 2005
    Publication date: February 22, 2007
    Applicant: Astec International Limited
    Inventors: Vijay Phadke, James Sigamani
  • Publication number: 20060274468
    Abstract: A circuit and corresponding method for controlling inrush current in an AC-DC power converter by providing a relay and a control circuit for limiting inrush current efficiently during cold startup, warm startup, and power line disturbance conditions. The relay is preferably connected in series with a bulk capacitor of the converter and in parallel with a limiting resistor and switch for shunting the resistor and switch so as to improve efficiency during operating conditions, at reduced size and cost. A preferred embodiment includes use of the circuit for AC-DC converters having active power factor correction.
    Type: Application
    Filed: June 3, 2005
    Publication date: December 7, 2006
    Inventor: Vijay Phadke
  • Publication number: 20060133115
    Abstract: A method of regulating a power converter using a transformer primary-side feedback winding to provide a feedback signal. The feedback signal is selectively blanked based on a signal indicative of a duty cycle of a switch controlling the converter. The converter is regulated based on the selectively blanked feedback signal. The blanking is dynamically adapted to changes in the switch duty cycle.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 22, 2006
    Inventor: Vijay Phadke
  • Publication number: 20060120123
    Abstract: A circuit for controlling the operation of synchronous rectifiers. The circuit delays the turn-off of the synchronous rectifiers in accordance with the load current. The magnitude of the load current is examined to determine which of a plurality of delay elements is selected to delay turn-off of the synchronous rectifiers. Delay is accomplished by holding up for a predetermined time period one of a plurality of control signals utilized to determine when the synchronous rectifier should be turned-off.
    Type: Application
    Filed: December 2, 2004
    Publication date: June 8, 2006
    Applicant: Astec International Limited
    Inventors: Vijay Phadke, Arlaindo Asuncion, Richard Caubang
  • Publication number: 20050030772
    Abstract: A circuit that utilizes most of the energy stored in the bulk capacitor of an AC to DC or DC to DC converter power supply by providing an intermediate converter between a first stage boost converter and a DC-DC converter. When the bulk voltage starts to fall during the hold-up time, the intermediate converter boosts the falling voltage to maintain the regulated DC input to the DC to DC converter while reducing the operating range and increasing the operating duty cycle, so as to increase efficiency, reduce peak current and voltage stresses, reduce the size of output filter components and reduce the size of the bulk capacitance by up to half.
    Type: Application
    Filed: August 6, 2004
    Publication date: February 10, 2005
    Inventor: Vijay Phadke
  • Publication number: 20050030778
    Abstract: A soft switched zero voltage transition full bridge converter for reducing power loss at very light loads for zero voltage switching (ZVS) converters operating at high frequency. The converter has four switches in two switching legs each of two switches connected in series between two input voltage terminals, junction points of the legs being coupled to a primary winding of a transformer, a secondary winding from which an output voltage of the converter is derived by rectifying and filtering. A pair of capacitive voltage dividers are connected between the input terminals, each formed by two small capacitors each having a parallel-connected diode. The output voltage is regulated by phase shift control of the switches. The capacitors are selected small enough for storing only enough energy to enable ZVS in conjunction with two resonant inductors. The converter enables reduced component size of the inductors and energy storage capacitors.
    Type: Application
    Filed: August 6, 2004
    Publication date: February 10, 2005
    Inventors: Vijay Phadke, Arlaindo Asuncion, Israel Beltran
  • Publication number: 20050030767
    Abstract: A circuit for reducing the internal power losses of a soft switching full bridge converter at light loads and enables very high frequency operation without using a cold plate approach. In a preferred embodiment, the circuit includes a resonant inductor and blocking inductor on the primary side of the converter arranged so as to provide the reduced losses for zero voltage switching bridge converter. The circuit provides the above benefits even for converters having a power transformer with very low leakage inductance. The circuit is not dependent on the presence of a high leakage inductance for the power transformer. The circuit can be used in soft switched half bridge or full bridge converters. The inventive circuit can also be used in a hard switching full bridge or half bridge converter for achieving zero voltage switching at reduced cost with reduced losses at light load, if the operating duty cycle of the converter is set near fifty percent.
    Type: Application
    Filed: August 6, 2004
    Publication date: February 10, 2005
    Inventors: Vijay Phadke, Arlaindo Asuncion, Israel Beltran