Patents by Inventor Vijayakumar Ashok DIBBAD

Vijayakumar Ashok DIBBAD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11829172
    Abstract: An aspect of the disclosure relates to an apparatus including: an integrated circuit (IC) including one or more cores, and a current limit detection circuit; a voltage regulator; an inductor coupled between the voltage regulator and the one or more cores of the IC; and a current sensing circuit including inputs coupled across the inductor and an output coupled to the current limit detection circuit of the IC.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: November 28, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vijayakumar Ashok Dibbad, Fredrick Bontemps, Matthew Severson, Timothy Zoley
  • Publication number: 20230266782
    Abstract: An aspect of the disclosure relates to an apparatus including: an integrated circuit (IC) including one or more cores, and a current limit detection circuit; a voltage regulator; an inductor coupled between the voltage regulator and the one or more cores of the IC; and a current sensing circuit including inputs coupled across the inductor and an output coupled to the current limit detection circuit of the IC.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 24, 2023
    Inventors: Vijayakumar Ashok DIBBAD, Fredrick BONTEMPS, Matthew SEVERSON, Timothy ZOLEY
  • Patent number: 11630694
    Abstract: Task scheduling in a computing device may be based in part on voltage regulator efficiency. For an additional task to be scheduled, multiple task scheduling cases may be determined that represent execution of the additional task on each of a number of processors concurrently with one or more other tasks executing among the processors. For each task scheduling case, a regulator input power level for a voltage regulator may be determined based on a performance level indication associated with the additional task, the one or more other tasks executing on the processors, and the efficiency level of each voltage regulator. For each task scheduling case, a total regulator input power level may be determined by summing the regulator input power levels for all voltage regulators. The additional task may be executed on a processor associated with a task scheduling case for which total regulator input power is lowest.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 18, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Vijayakumar Ashok Dibbad, Bharat Kumar Rangarajan, Prashanth Kumar Kakkireni, Srinivas Turaga
  • Publication number: 20220365580
    Abstract: In controlling power in a portable computing device (“PCD”), a power supply input to a PCD subsystem may be modulated with a modulation signal when an over-current condition is detected. Detection of the modulation signal may indicate to a processing core of the subsystem to reduce its processing load. Compensation for the modulation signal in the power supply input may be applied so that the processing core is essentially unaffected by the modulation signal.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 17, 2022
    Inventors: VIJAYAKUMAR ASHOK DIBBAD, Bharat Kumar RANGARAJAN, Dipti Ranjan PAL, Keith Alan BOWMAN, Matthew SEVERSON, Gordon LEE
  • Patent number: 11493980
    Abstract: In controlling power in a portable computing device (“PCD”), a power supply input to a PCD subsystem may be modulated with a modulation signal when an over-current condition is detected. Detection of the modulation signal may indicate to a processing core of the subsystem to reduce its processing load. Compensation for the modulation signal in the power supply input may be applied so that the processing core is essentially unaffected by the modulation signal.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: November 8, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Vijayakumar Ashok Dibbad, Bharat Kumar Rangarajan, Dipti Ranjan Pal, Keith Alan Bowman, Matthew Severson, Gordon Lee
  • Publication number: 20220222112
    Abstract: Task scheduling in a computing device may be based in part on voltage regulator efficiency. For an additional task to be scheduled, multiple task scheduling cases may be determined that represent execution of the additional task on each of a number of processors concurrently with one or more other tasks executing among the processors. For each task scheduling case, a regulator input power level for a voltage regulator may be determined based on a performance level indication associated with the additional task, the one or more other tasks executing on the processors, and the efficiency level of each voltage regulator. For each task scheduling case, a total regulator input power level may be determined by summing the regulator input power levels for all voltage regulators. The additional task may be executed on a processor associated with a task scheduling case for which total regulator input power is lowest.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 14, 2022
    Inventors: Vijayakumar Ashok DIBBAD, Bharat Kumar RANGARAJAN, Prashanth Kumar KAKKIRENI, Srinivas TURAGA