Patents by Inventor Vikram Madhukar Labhe

Vikram Madhukar Labhe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Variable read/write margin high-performance soft-error tolerant SRAM bit cell
    Patent number: 6510076
    Abstract: A single event upset (SEU) tolerant SRAM bit cell for six-transistor (6T), eight-transistor (8T), or multi-port RAM cell configurations fabricated in accordance with 0.18 &mgr;m or smaller CMOS processes. SEU tolerance is achieved without significantly increasing the cell's read and write cycle time and negligible impact on cell stability.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: January 21, 2003
    Assignee: PMC-Sierra, Inc.
    Inventors: Curtis Brian Lapadat, Vikram Madhukar Labhe, Gavril Andrei Margittai, Mamta Bansal