Patents by Inventor Viktor Zekeriya

Viktor Zekeriya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080296143
    Abstract: Plasma systems with magnetic filter devices to alter film deposition/etching characteristics by altering the effective magnetic field distribution. The magnetic filter devices are placed between the magnet or magnets and a target, typically a semiconductor wafer, and selected and configured to alter the magnetic field to obtain the desired processing results. For deposition, the magnetic filter may be chosen to provide more uniform deposition, to provide increased deposition rates at or adjacent the edges of a wafer to compensate for increased etching rates at the edges of a wafer in a subsequent etching or polishing process. For annealing and doping, the magnetic field may be altered to provide more uniform equivalent annealing or doping across the wafer. Various applications are disclosed.
    Type: Application
    Filed: August 14, 2008
    Publication date: December 4, 2008
    Applicant: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Joseph Paul Ellul, Melvin C. Schmidt, Viktor Zekeriya, Rajiv L. Patel, Jack Kelly
  • Publication number: 20070246354
    Abstract: Plasma systems with magnetic filter devices to alter film deposition/etching characteristics by altering the effective magnetic field distribution. The magnetic filter devices are placed between the magnet or magnets and a target, typically a semiconductor wafer, and selected and configured to alter the magnetic field to obtain the desired processing results. For deposition, the magnetic filter may be chosen to provide more uniform deposition, to provide increased deposition rates at or adjacent the edges of a wafer to compensate for increased etching rates at the edges of a wafer in a subsequent etching or polishing process. For annealing and doping, the magnetic field may be altered to provide more uniform equivalent annealing or doping across the wafer. Various applications are disclosed.
    Type: Application
    Filed: April 19, 2006
    Publication date: October 25, 2007
    Inventors: Joseph Ellul, Melvin Schmidt, Viktor Zekeriya, Rajiv Patel, Jack Kelly
  • Patent number: 6962842
    Abstract: A method of removing a sacrificial emitter feature in a bipolar complementary metal oxide semiconductor (BICMOS) process with a super self-aligned bipolar junction transistor (BJT) is disclosed. According to the new method, a mask layer, such as an oxide deposited using high density plasma (HDP) techniques, is deposited over an extrinsic base layer and over a sacrificial emitter structure. Because of the particular characteristic of the HDP oxide, the deposition of HDP oxide forms a triangular-like structure over the sacrificial emitter structure having a maximum thickness less than the thickness of the HDP oxide over the extrinsic base layer. This facilitates the complete removal of the HDP oxide above the sacrificial emitter layer without the complete removal of the HDP oxide above the extrinsic base layer. This allows the removal of the sacrificial emitter structure while the remaining HDP oxide, serving as a mask, protects the underlying extrinsic base layer.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: November 8, 2005
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Alexander Kalnitsky, Sang H. Park, Viktor Zekeriya, Larry Wang
  • Patent number: 6855585
    Abstract: A method for forming multiple resistors on a substrate. The method initially includes providing a first resistor on the substrate. A first dielectric layer is deposited, patterned, and selectively etched over the first resistor. Second resistor material is provided over the first dielectric layer. Furthermore, landing pad material is provided over the second resistor material. The landing pad material and the second resistor material are then selectively etched. The selective etching forms contacts for the first resistor in a first region, and forms a second resistor and associated contacts in a second region.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: February 15, 2005
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Alexander Kalnitsky, Joseph Paul Elull, Ralph Wall, Robert F. Scheer, Jonathan Herman, Glenn Nobinger, Viktor Zekeriya
  • Patent number: 6607962
    Abstract: A method of forming a thin film resistor contact incorporates an etch-stop material to protect the underlying thin film resistor from a subsequent dry etching process to form a contact opening to the thin film resistor. More specifically, the method includes forming a thin film resistor, forming a first dielectric layer over the thin film resistor, forming a first opening through the first dielectric layer to expose an underlying portion of the thin film resistor, forming an etch-stop within the first opening of the first dielectric layer, forming a second dielectric layer over the etch-stop and the first dielectric layer, forming a second opening through the second dielectric layer to expose the underlying portion of the etch-stop, and forming a metal plug within the second contact opening, wherein the metal plug is in electrical contact with the thin film resistor by way of the etch-stop.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: August 19, 2003
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Viktor Zekeriya, Khanh Tran
  • Publication number: 20030030107
    Abstract: A method of forming a thin film resistor contact incorporates an etch-stop material to protect the underlying thin film resistor from a subsequent dry etching process to form a contact opening to the thin film resistor. More specifically, the method includes forming a thin film resistor, forming a first dielectric layer over the thin film resistor, forming a first opening through the first dielectric layer to expose an underlying portion of the thin film resistor, forming an etch-stop within the first opening of the first dielectric layer, forming a second dielectric layer over the etch-stop and the first dielectric layer, forming a second opening through the second dielectric layer to expose the underlying portion of the etch-stop, and forming a metal plug within the second contact opening, wherein the metal plug is in electrical contact with the thin film resistor by way of the etch-stop.
    Type: Application
    Filed: August 9, 2001
    Publication date: February 13, 2003
    Inventors: Viktor Zekeriya, Khanh Tran
  • Patent number: 6358809
    Abstract: A method of modifying a layer of thin film composite material to achieve one or more desired properties for the thin film layer which cannot be achieved by heat treatment at all practical temperatures of operation allowable by particular integrated circuit processes. In particular, the thin film composite material is subjected to an ion implantation process. Depending on the doping species, the doping concentration, the doping energy, and other ion implantation parameters, one or more properties of the deposited thin film resistive layer can be modified. Such properties may include electrical, optical, thermal and physical properties. For instance, the sheet resistance and/or the temperature coefficient of resistance of the thin film composite material may be increased or decreased by appropriately implanting ions into the material. The ion implantation can be applied globally in order to modify one or more properties of the entire deposited thin film composite layer.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: March 19, 2002
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Glenn Nobinger, Alexander Kalnitsky, Melvin Schmidt, Jonathan Herman, Viktor Zekeriya, Vijaykumar Ullal, Daniel H. Rosenblatt, Joseph P. Ellul