Patents by Inventor Vilakkudi G. Veeraraghavan
Vilakkudi G. Veeraraghavan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11764702Abstract: Disclosed is an adaptable DC-AC inverter system and its operation. The system includes multiple DC input sources as input to provide a stable operation under various conditions. DC input sources may be added to the system or removed from the system without impacting the functionality of the system. The disclosed system is suited for solar energy harvesting in grid-connected or off-grid modes of operation.Type: GrantFiled: April 11, 2022Date of Patent: September 19, 2023Assignee: Kripya LLCInventors: Vilakkudi G Veeraraghavan, Ramarao Ananathakrishnan, Asif Ismail, Murali Thangaraj, Thotakura Venkata Ravindra
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Publication number: 20220239235Abstract: Disclosed is an adaptable DC-AC inverter system and its operation. The system includes multiple DC input sources as input to provide a stable operation under various conditions. DC input sources may be added to the system or removed from the system without impacting the functionality of the system. The disclosed system is suited for solar energy harvesting in grid-connected or off-grid modes of operation.Type: ApplicationFiled: April 11, 2022Publication date: July 28, 2022Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Asif Ismail, Murali Thangaraj, Thotakura Venkata Ravindra
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Patent number: 11303221Abstract: Disclosed is a drive system and its operation for multiple DC-AC inverters working in parallel, for applications such as off-grid solar energy harvesting, which enables a stable operation under various load conditions. The disclosed drive system offers voltage and frequency synchronized sine wave output from each of the inverters, enabling stable operation of the entire system under differing load conditions.Type: GrantFiled: September 25, 2020Date of Patent: April 12, 2022Assignee: Kripya LLCInventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Murali Thangaraj, Asif Ismail
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Publication number: 20220103092Abstract: Disclosed is a drive system and its operation for multiple DC-AC inverters working in parallel, for applications such as off-grid solar energy harvesting, which enables a stable operation under various load conditions. The disclosed drive system offers voltage and frequency synchronized sine wave output from each of the inverters, enabling stable operation of the entire system under differing load conditions.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Murali Thangaraj, Asif Ismail
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Patent number: 10396563Abstract: A system and process of its operation for monitoring and managing load circuits connected to a renewable energy generation system are disclosed. A programmable load manger circuit continuously monitors the available energy from the generation system and manages the load circuits connected to the system in a manner such that the energy demand from the active load circuits is below the level of available energy. The load circuits can be prioritized and programmed such that the lower priority loads are deactivated prior to the higher priority loads when the available energy from the generation system is not sufficient to satisfy demand from all the active load circuits. When the renewable energy generation system incorporates more than one generator, a load balancing control algorithm, continuously monitoring the load connected to the system and allocates the load in a balanced manner to each of the generators in the system.Type: GrantFiled: April 20, 2017Date of Patent: August 27, 2019Assignee: Kripya LLCInventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
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Publication number: 20170310114Abstract: A system and process of its operation for monitoring and managing load circuits connected to a renewable energy generation system are disclosed. A programmable load manger circuit continuously monitors the available energy from the generation system and manages the load circuits connected to the system in a manner such that the energy demand from the active load circuits is below the level of available energy. The load circuits can be prioritized and programmed such that the lower priority loads are deactivated prior to the higher priority loads when the available energy from the generation system is not sufficient to satisfy demand from all the active load circuits. When the renewable energy generation system incorporates more than one generator, a load balancing control algorithm, continuously monitoring the load connected to the system and allocates the load in a balanced manner to each of the generators in the system.Type: ApplicationFiled: April 20, 2017Publication date: October 26, 2017Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S. Balavenkataraman
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Patent number: 9590528Abstract: A dual mode direct current-to-alternating current (DC-AC) inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “power control mode” when connection to the active external AC source is absent. Processes for operating an array of these DC-AC inverters are disclosed. The dual mode operation capability enables the DC-AC inverters to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., power control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the power control mode of operation, a process may include designating a master from the array of DC-AC inverters in order to establish the voltage and frequency reference.Type: GrantFiled: February 12, 2016Date of Patent: March 7, 2017Assignee: Kripya LLCInventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
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Patent number: 9444366Abstract: A dual mode direct current-to-alternating current (DC-AC) micro-inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC micro-inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “voltage control mode” when connection to the active external AC source is absent. Processes for operating an array of these micro-inverters are disclosed. The dual mode operation capability enables the micro-inverter(s) to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., voltage control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the voltage control mode of operation, a process may include designating a master from the array of micro-inverters in order to establish the voltage and frequency references.Type: GrantFiled: February 6, 2015Date of Patent: September 13, 2016Assignee: Kripya LLCInventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
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Publication number: 20160164431Abstract: A dual mode direct current-to-alternating current (DC-AC) inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “power control mode” when connection to the active external AC source is absent. Processes for operating an array of these DC-AC inverters are disclosed. The dual mode operation capability enables the DC-AC inverters to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., power control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the power control mode of operation, a process may include designating a master from the array of DC-AC inverters in order to establish the voltage and frequency reference.Type: ApplicationFiled: February 12, 2016Publication date: June 9, 2016Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S. Balavenkataraman
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Publication number: 20150295511Abstract: A dual mode direct current-to-alternating current (DC-AC) micro-inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC micro-inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “voltage control mode” when connection to the active external AC source is absent. Processes for operating an array of these micro-inverters are disclosed. The dual mode operation capability enables the micro-inverter(s) to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., voltage control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the voltage control mode of operation, a process may include designating a master from the array of micro-inverters in order to establish the voltage and frequency references.Type: ApplicationFiled: February 6, 2015Publication date: October 15, 2015Applicant: KRIPYA LLCInventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
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Patent number: 6471789Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.Type: GrantFiled: May 18, 1995Date of Patent: October 29, 2002Assignee: ATI PropertiesInventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan, Stephen D. Washko
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Patent number: 6296948Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.Type: GrantFiled: February 17, 1981Date of Patent: October 2, 2001Assignee: ATI Properties, Inc.Inventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan, Stephen D. Washko
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Patent number: 6277212Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.Type: GrantFiled: September 27, 1982Date of Patent: August 21, 2001Assignee: ATI Properties, Inc.Inventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan, Stephen D. Washko
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Patent number: 5370749Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.Type: GrantFiled: July 30, 1992Date of Patent: December 6, 1994Assignee: Allegheny Ludlum CorporationInventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan
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Patent number: 5201451Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates.Type: GrantFiled: July 9, 1991Date of Patent: April 13, 1993Assignee: International Business Machines Corp.Inventors: Kishor V. Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Endwell, Tamar A. Sholtes, Vilakkudi G. Veeraraghavan, Charles G. Woychik
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Patent number: 5170931Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates.Type: GrantFiled: January 23, 1991Date of Patent: December 15, 1992Assignee: International Business Machines CorporationInventors: Kishor V. Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Tamar A. Sholtes, Vilakkudi G. Veeraraghavan, Charles G. Woychik
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Patent number: 5159535Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates.Type: GrantFiled: June 13, 1989Date of Patent: October 27, 1992Assignee: International Business Machines CorporationInventors: Kishor V. Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Tamar A. Sholtes, Vilakkudi G. Veeraraghavan, Charles G. Woychik
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Patent number: 4166756Abstract: A process for the manufacture of railroad car truck components with high wear resistant qualities involves an alloy of specific composition, dumping from the sand mold above a specific temperature and being allowed to cool in air, resulting in an "as cast" acicular microstructure having very little amounts of Pearlite and carbides. This process eliminates the heat treating, quenching and draw operations normally associated with the production of wear resistant, acicular castings.Type: GrantFiled: March 31, 1978Date of Patent: September 4, 1979Assignee: Standard Car Truck Co.Inventors: Robert P. Geyer, Kenneth F. Veasman, Vilakkudi G. Veeraraghavan