Patents by Inventor Vilakkudi G. Veeraraghavan

Vilakkudi G. Veeraraghavan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11764702
    Abstract: Disclosed is an adaptable DC-AC inverter system and its operation. The system includes multiple DC input sources as input to provide a stable operation under various conditions. DC input sources may be added to the system or removed from the system without impacting the functionality of the system. The disclosed system is suited for solar energy harvesting in grid-connected or off-grid modes of operation.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: September 19, 2023
    Assignee: Kripya LLC
    Inventors: Vilakkudi G Veeraraghavan, Ramarao Ananathakrishnan, Asif Ismail, Murali Thangaraj, Thotakura Venkata Ravindra
  • Publication number: 20220239235
    Abstract: Disclosed is an adaptable DC-AC inverter system and its operation. The system includes multiple DC input sources as input to provide a stable operation under various conditions. DC input sources may be added to the system or removed from the system without impacting the functionality of the system. The disclosed system is suited for solar energy harvesting in grid-connected or off-grid modes of operation.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Asif Ismail, Murali Thangaraj, Thotakura Venkata Ravindra
  • Patent number: 11303221
    Abstract: Disclosed is a drive system and its operation for multiple DC-AC inverters working in parallel, for applications such as off-grid solar energy harvesting, which enables a stable operation under various load conditions. The disclosed drive system offers voltage and frequency synchronized sine wave output from each of the inverters, enabling stable operation of the entire system under differing load conditions.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: April 12, 2022
    Assignee: Kripya LLC
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Murali Thangaraj, Asif Ismail
  • Publication number: 20220103092
    Abstract: Disclosed is a drive system and its operation for multiple DC-AC inverters working in parallel, for applications such as off-grid solar energy harvesting, which enables a stable operation under various load conditions. The disclosed drive system offers voltage and frequency synchronized sine wave output from each of the inverters, enabling stable operation of the entire system under differing load conditions.
    Type: Application
    Filed: September 25, 2020
    Publication date: March 31, 2022
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Murali Thangaraj, Asif Ismail
  • Patent number: 10396563
    Abstract: A system and process of its operation for monitoring and managing load circuits connected to a renewable energy generation system are disclosed. A programmable load manger circuit continuously monitors the available energy from the generation system and manages the load circuits connected to the system in a manner such that the energy demand from the active load circuits is below the level of available energy. The load circuits can be prioritized and programmed such that the lower priority loads are deactivated prior to the higher priority loads when the available energy from the generation system is not sufficient to satisfy demand from all the active load circuits. When the renewable energy generation system incorporates more than one generator, a load balancing control algorithm, continuously monitoring the load connected to the system and allocates the load in a balanced manner to each of the generators in the system.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: August 27, 2019
    Assignee: Kripya LLC
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
  • Publication number: 20170310114
    Abstract: A system and process of its operation for monitoring and managing load circuits connected to a renewable energy generation system are disclosed. A programmable load manger circuit continuously monitors the available energy from the generation system and manages the load circuits connected to the system in a manner such that the energy demand from the active load circuits is below the level of available energy. The load circuits can be prioritized and programmed such that the lower priority loads are deactivated prior to the higher priority loads when the available energy from the generation system is not sufficient to satisfy demand from all the active load circuits. When the renewable energy generation system incorporates more than one generator, a load balancing control algorithm, continuously monitoring the load connected to the system and allocates the load in a balanced manner to each of the generators in the system.
    Type: Application
    Filed: April 20, 2017
    Publication date: October 26, 2017
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S. Balavenkataraman
  • Patent number: 9590528
    Abstract: A dual mode direct current-to-alternating current (DC-AC) inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “power control mode” when connection to the active external AC source is absent. Processes for operating an array of these DC-AC inverters are disclosed. The dual mode operation capability enables the DC-AC inverters to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., power control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the power control mode of operation, a process may include designating a master from the array of DC-AC inverters in order to establish the voltage and frequency reference.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: March 7, 2017
    Assignee: Kripya LLC
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
  • Patent number: 9444366
    Abstract: A dual mode direct current-to-alternating current (DC-AC) micro-inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC micro-inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “voltage control mode” when connection to the active external AC source is absent. Processes for operating an array of these micro-inverters are disclosed. The dual mode operation capability enables the micro-inverter(s) to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., voltage control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the voltage control mode of operation, a process may include designating a master from the array of micro-inverters in order to establish the voltage and frequency references.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: September 13, 2016
    Assignee: Kripya LLC
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
  • Publication number: 20160164431
    Abstract: A dual mode direct current-to-alternating current (DC-AC) inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “power control mode” when connection to the active external AC source is absent. Processes for operating an array of these DC-AC inverters are disclosed. The dual mode operation capability enables the DC-AC inverters to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., power control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the power control mode of operation, a process may include designating a master from the array of DC-AC inverters in order to establish the voltage and frequency reference.
    Type: Application
    Filed: February 12, 2016
    Publication date: June 9, 2016
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S. Balavenkataraman
  • Publication number: 20150295511
    Abstract: A dual mode direct current-to-alternating current (DC-AC) micro-inverter is capable of operating either with or without connection to an active external AC power source. The dual mode DC-AC micro-inverter may operate in “current control mode” when connection to the active AC power source is present and may operate in “voltage control mode” when connection to the active external AC source is absent. Processes for operating an array of these micro-inverters are disclosed. The dual mode operation capability enables the micro-inverter(s) to function both in the grid connected mode (i.e., current control mode) as well as off-grid mode (i.e., voltage control mode). The system is configured to sense the presence or absence of grid power and automatically select the appropriate mode of operation. For the voltage control mode of operation, a process may include designating a master from the array of micro-inverters in order to establish the voltage and frequency references.
    Type: Application
    Filed: February 6, 2015
    Publication date: October 15, 2015
    Applicant: KRIPYA LLC
    Inventors: Vilakkudi G. Veeraraghavan, Ramarao Ananathakrishnan, Muthiam S Balavenkataraman
  • Patent number: 6471789
    Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.
    Type: Grant
    Filed: May 18, 1995
    Date of Patent: October 29, 2002
    Assignee: ATI Properties
    Inventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan, Stephen D. Washko
  • Patent number: 6296948
    Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.
    Type: Grant
    Filed: February 17, 1981
    Date of Patent: October 2, 2001
    Assignee: ATI Properties, Inc.
    Inventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan, Stephen D. Washko
  • Patent number: 6277212
    Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.
    Type: Grant
    Filed: September 27, 1982
    Date of Patent: August 21, 2001
    Assignee: ATI Properties, Inc.
    Inventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan, Stephen D. Washko
  • Patent number: 5370749
    Abstract: An amorphous metal alloy strip is disclosed having a width greater than about one inch and a thickness less than about 0.003 inch, this alloy consists essentially of 77 to 80 atomic percent iron, 12 to 16 atomic percent boron and 5 to 10 atomic percent silicon with incidental impurities. The strip has a 60 cycle per second core loss of less than about 0.100 watts per pound at 12.6 kilogauss, saturation magnetization of at least 15 kilogauss, and a coercive force of less than about 0.04 oersteds. Such alloy is further characterized by increased castability and the strip produced therefrom exhibits at least singular ductility. A method of producing such optimum strip is also disclosed.
    Type: Grant
    Filed: July 30, 1992
    Date of Patent: December 6, 1994
    Assignee: Allegheny Ludlum Corporation
    Inventors: S. Leslie Ames, Vilakkudi G. Veeraraghavan
  • Patent number: 5201451
    Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates.
    Type: Grant
    Filed: July 9, 1991
    Date of Patent: April 13, 1993
    Assignee: International Business Machines Corp.
    Inventors: Kishor V. Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Endwell, Tamar A. Sholtes, Vilakkudi G. Veeraraghavan, Charles G. Woychik
  • Patent number: 5170931
    Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates.
    Type: Grant
    Filed: January 23, 1991
    Date of Patent: December 15, 1992
    Assignee: International Business Machines Corporation
    Inventors: Kishor V. Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Tamar A. Sholtes, Vilakkudi G. Veeraraghavan, Charles G. Woychik
  • Patent number: 5159535
    Abstract: Method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package. The resulting electronic packaging structure includes electrically conductive spacers, such as solder balls or solder coated copper balls, which electrically interconnect outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding bonding pads on the second level electronic package, and which physically support the flexible film of the semiconductor chip carrier substantially in a plane above the surface of the second level electronic package. This electronic packaging structure is made using a special assembly fixture comprising a base plate, a pressure insert with a resilient member, and a top plate. The flexible film semiconductor chip carrier with the spacers attached thereto is placed over the resilient member of the pressure insert which is clamped together with the second level electronic package between the top and base plates.
    Type: Grant
    Filed: June 13, 1989
    Date of Patent: October 27, 1992
    Assignee: International Business Machines Corporation
    Inventors: Kishor V. Desai, Nelson P. Franchak, Robert H. Katyl, Harold Kohn, Tamar A. Sholtes, Vilakkudi G. Veeraraghavan, Charles G. Woychik
  • Patent number: 4166756
    Abstract: A process for the manufacture of railroad car truck components with high wear resistant qualities involves an alloy of specific composition, dumping from the sand mold above a specific temperature and being allowed to cool in air, resulting in an "as cast" acicular microstructure having very little amounts of Pearlite and carbides. This process eliminates the heat treating, quenching and draw operations normally associated with the production of wear resistant, acicular castings.
    Type: Grant
    Filed: March 31, 1978
    Date of Patent: September 4, 1979
    Assignee: Standard Car Truck Co.
    Inventors: Robert P. Geyer, Kenneth F. Veasman, Vilakkudi G. Veeraraghavan