Patents by Inventor Vinay Srinivas

Vinay Srinivas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240180445
    Abstract: The present disclosure relates to methods and systems of determining swimming metrics of a user during a swimming session. The method can include receiving, by a processor circuit of a user device, motion information from one or more motion sensors of the user device; determining, by the processor circuit using the motion information, a first set of rotational data of the user device, wherein the first set of rotational data is expressed in a first frame of reference; converting, by the processor circuit, the first set of rotational data into a second set of rotational data, wherein the second set of rotational data is expressed in a second frame of reference; determining, by the processor circuit, one or more swimming metrics of the user; and outputting the one or more swimming metrics.
    Type: Application
    Filed: February 12, 2024
    Publication date: June 6, 2024
    Inventors: Bharath Narasimha Rao, Craig Mermel, Karthik Jayaraman Raghuram, Hung A. Pham, Adam S. Howell, Rami Y. Hindiyeh, James P. Ochs, Vinay R. Majjigi, Alexander Singh Alvarado, Sunny K. Chow, Umamahesh Srinivas, Xing Tan, Ronald K. Huang, Edith Merle Arnold, Robin T. Guers, Gunes Dervisoglu, Adeeti Ullal
  • Publication number: 20240179089
    Abstract: The disclosure relates to computer networking and, more specifically, to service chaining a containerized network function (CNF) using a containerized router, the CNF and containerized router both deployed to the same server. In an example, a method comprises executing, with a computing device: a containerized network function; a virtual router to implement a data plane for a containerized router; and a containerized routing protocol daemon to implement a control plane for the containerized router, wherein the containerized network function and containerized routing protocol daemon execute on the same computing device, and wherein a first virtual network interface of the computing device enables communications between the containerized network function and the virtual router; and forwarding, by the virtual router, based on a static route, traffic destined for a prefix to the first virtual network interface to send the traffic to the containerized network function.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 30, 2024
    Inventors: Sasha Cirkovic, Sachchidanand Vaidya, AnandaVelu Thulasiram, Aravind Srinivas Srinivasa Prabhakar, Sai Prashanth Ramanathan, Yuvaraja Mariappan, Lavanya Kumar Ambatipudi, Vinay K Nallamothu
  • Publication number: 20240101506
    Abstract: The present invention discloses a continuous process for the synthesis of dimethyl carbonate from methanol and carbon dioxide over a ceria-based mixed metal oxide-silica catalyst formulation in the presence of a dehydrating or water trapping compound (2-Cyanopyridine).
    Type: Application
    Filed: January 25, 2022
    Publication date: March 28, 2024
    Inventors: Darbha SRINIVAS, Vijay Vasant BOKADE, Prashant Suresh NIPHADKAR, Unnikrishnan PULIKKEEL, Snehalkumar PARMAR, Vinay AMTE, Surajit SENGUPTA, Asit Kumar DAS
  • Publication number: 20240090782
    Abstract: In an embodiment, a method comprises: establishing, by a wireless wearable computer worn by a user, a wireless communication connection with a fitness machine; obtaining machine data from the fitness machine while the user is engaged in a workout session on the fitness machine; obtaining, from a heart rate sensor of the wireless device, heart rate data of the user; determining a calibrated maximal oxygen consumption of the user based on the heart rate data and the machine data; determining a heart rate caloric expenditure based on the heart rate data and the calibrated maximal oxygen consumption of the user; and providing information corresponding to the heart rate caloric expenditure for presentation.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Applicant: Apple Inc.
    Inventors: Bharath Narasimha Rao, Jennifer Strasser, Umamahesh Srinivas, Kevin Sheridan, James Ochs, Vinay R. Majjigi, Karthik Jayaraman Raghuram, Olivier Humblet, Jay Kriz Blahnik
  • Publication number: 20220108149
    Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for processing inputs using a neural network system that includes one or more pre-normalized layers or one or more regularization normalization layers.
    Type: Application
    Filed: October 4, 2021
    Publication date: April 7, 2022
    Inventors: Jascha Narain Sohl-Dickstein, Vinay Srinivas Rao
  • Patent number: 7222311
    Abstract: A method and an apparatus are provided for post-layout optimization of an integrated circuit. In one instance, only local transformations accomplished by incremental changes to placement and routing are provided, so as to avoid the costly design iteration loop that requires re-synthesis, re-place and re-route. Optimization can be provided in multiple optimization phases each accomplishing a specified set of transformations. Static timing analysis is performed at the end of each set of local transformations to determine if further optimization steps are required. In one instance, the physical design is first scanned for mismatch between drivers and loads. Then, in a second optimization phase, “hot spots” in the physical design are identified for local transformation using a “bidirectional combinational total negative slack” (BCTNS) algorithm. In subsequent phases, optimization based on meeting setup times and hold times in a critical path are performed.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: May 22, 2007
    Assignee: Sequence Design, Inc.
    Inventors: Douglas Kaufman, Hazem Almusa, Vinay Srinivas, Donald V. Organ, Larry Ke, Wei Li, Japinder Singh, Robert Mathews
  • Publication number: 20050050108
    Abstract: The cluster identifiers of the clusters which together store the data of a file, are retrieved and stored in a random access memory (RAM) according to a pre-specified convention (e.g., as an associative array starting at a pre-specified location of the RAM). Due to such storing, any portion of the content of the file can be accessed quickly. The feature can be advantageously used to reduce memory space requirements. In one embodiment, a metadata processing module retrieves and stores the cluster identifiers, and other modules use the same to access the file contents according to the convention. Thus, such other modules can be implemented with fewer instructions. In addition, each of the other modules can be overlaid in the same memory space used by the metadata processing module, thereby reducing the aggregate memory space requirement.
    Type: Application
    Filed: August 16, 2004
    Publication date: March 3, 2005
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Anand SAWANT, Vinay SRINIVAS, New SUNDERARAJ
  • Publication number: 20030177455
    Abstract: A method and an apparatus are provided for post-layout optimization of an integrated circuit. In one instance, only local transformations accomplished by incremental changes to placement and routing are provided, so as to avoid the costly design iteration loop that requires re-synthesis, re-place and re-route. Optimization can be provided in multiple optimization phases each accomplishing a specified set of transformations. Static timing analysis is performed at the end of each set of local transformations to determine if further optimization steps are required. In one instance, the physical design is first scanned for mismatch between drivers and loads. Then, in a second optimization phase, “hot spots” in the physical design are identified for local transformation using a “bidirectional combinational total negative slack” (BCTNS) algorithm. In subsequent phases, optimization based on meeting setup times and hold times in a critical path are performed.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 18, 2003
    Applicant: Sequence Design, Inc.
    Inventors: Douglas Kaufman, Hazem Almusa, Vinay Srinivas, Donald V. Organ, Larry Ke, Wei Li, Japinder Singh, Robert Mathews
  • Patent number: 6591407
    Abstract: A method and an apparatus are provided for post-layout optimization of an integrated circuit. In one instance, only local transformations accomplished by incremental changes to placement and routing are provided, so as to avoid the costly design iteration loop that requires re-synthesis, re-place and re-route. Optimization can be provided in multiple optimization phases each accomplishing a specified set of transformations. Static timing analysis is performed at the end of each set of local transformations to determine if further optimization steps are required. In one instance, the physical design is first scanned for mismatch between drivers and loads. Then, in a second optimization phase, “hot spots” in the physical design are identified for local transformation using a “bidirectional combinational total negative slack” (BCTNS) algorithm. In subsequent phases, optimization based on meeting setup times and hold times in a critical path are performed.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: July 8, 2003
    Assignee: Sequence Design, Inc.
    Inventors: Douglas Kaufman, Hazem Almusa, Vinay Srinivas, Donald V. Organ, Larry Ke, Wei Li, Japinder Singh, Robert Mathews