Patents by Inventor Vincent Bufferne

Vincent Bufferne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10839088
    Abstract: A method for managing embedded software modules for an electronic computer embedded in an electrical switching device for switching an electric current includes acquiring a software module including a runnable code and a service contract declaring the hardware resources required by the runnable code when it is run by the computer; installing the software module inside a host receptacle intended to form an environment for running a software module and including a memory location defined statically inside a memory of the computer and being associated with a subset of hardware resources of the computer; running the software module including a step consisting in verifying whether the operation of running of the software module respects the service contract, the running operation being allowed to continue if the service contract is respected and, otherwise, a recovery step is implemented in order to interrupt the running operation.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: November 17, 2020
    Assignee: SCHNEIDER ELECTRIC INDUSTRIES SAS
    Inventors: Vincent Bufferne, Vladimir Popovic
  • Publication number: 20190095633
    Abstract: A method for managing embedded software modules for an electronic computer embedded in an electrical switching device for switching an electric current includes acquiring a software module including a runnable code and a service contract declaring the hardware resources required by the runnable code when it is run by the computer; installing the software module inside a host receptacle intended to form an environment for running a software module and including a memory location defined statically inside a memory of the computer and being associated with a subset of hardware resources of the computer; running the software module including a step consisting in verifying whether the operation of running of the software module respects the service contract, the running operation being allowed to continue if the service contract is respected and, otherwise, a recovery step is implemented in order to interrupt the running operation.
    Type: Application
    Filed: August 27, 2018
    Publication date: March 28, 2019
    Applicant: SCHNEIDER ELECTRIC INDUSTRIES SAS
    Inventors: Vincent BUFFERNE, Vladimir POPOVIC
  • Patent number: 8756446
    Abstract: A microprocessor has a low-power mode and a non-low power mode. The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: June 17, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Vianney Rancurel, Vincent Bufferne, Gregory Meunier
  • Publication number: 20110035613
    Abstract: A microprocessor has a low-power mode and a non-low power mode. The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number.
    Type: Application
    Filed: April 11, 2008
    Publication date: February 10, 2011
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Vianney Rancurel, Vincent Bufferne, Gregory Meunier