Patents by Inventor Vincent D'Alessandro

Vincent D'Alessandro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160376773
    Abstract: Water leakage or rupture related problems in plumbing systems are major causes of damage to homes and small offices. A single leak can easily destroy a significant portion of a home or office in minutes. Currently, there is no system that comprehensively covers the management of catastrophic water rupture failures for a house or office space. Current solutions involve water leak detection or simple water supply cutoff valves. There is no existent solution that actively reduces the risk of water damage when the house or office is not in use.
    Type: Application
    Filed: June 28, 2015
    Publication date: December 29, 2016
    Applicant: Silicon DFx, Inc.
    Inventors: Zahi Said Abuhamdeh, Vincent D'Alessandro
  • Patent number: 7714565
    Abstract: According to the methods of the invention, a further delayed DLL signal is compared to the reference clock and a delayed reference clock signal is compared to a DLL signal. These two comparisons are performed on the 360° signal and on the 180° signal. The delay introduced by the methods of the invention is preferably adjustable based on the results of a process monitor test. The process monitor test can be run continuously and accounts for process, voltage and temperature. The methods of the invention can also be used to test for clock skew in a clock tree on a chip.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: May 11, 2010
    Assignee: Transwitch Corporation
    Inventors: Zahi S. Abuhamdeh, Vincent D'Alessandro
  • Publication number: 20080246461
    Abstract: According to the methods of the invention, a further delayed DLL signal is compared to the reference clock and a delayed reference clock signal is compared to a DLL signal. These two comparisons are performed on the 360° signal and on the 180° signal. The delay introduced by the methods of the invention is preferably adjustable based on the results of a process monitor test. The process monitor test can be run continuously and accounts for process, voltage and temperature. The methods of the invention can also be used to test for clock skew in a clock tree on a chip.
    Type: Application
    Filed: April 1, 2008
    Publication date: October 9, 2008
    Inventors: Zahi S. Abuhamdeh, Vincent D'Alessandro
  • Patent number: 7355380
    Abstract: According to the methods of the invention, a further delayed DLL signal is compared to the reference clock and a delayed reference clock signal is compared to a DLL signal. These two comparisons are performed on the 360° signal and on the 180° signal. The delay introduced by the methods of the invention is preferably adjustable based on the results of a process monitor test. The process monitor test can be run continuously and accounts for process, voltage and temperature. The methods of the invention can also be used to test for clock skew in a clock tree on a chip.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: April 8, 2008
    Assignee: TranSwitch Corporation
    Inventors: Zahi S. Abuhamdeh, Vincent D'Alessandro
  • Patent number: 6356212
    Abstract: A device and method for utilizing a single clock signal to generate a digital data stream signal for transmission in a compressed domain transmission system. The device includes a plurality of packetized elementary stream encoders electronically coupled to a transport stream encoder electronically coupled to an output interface adapted to generate the digital data stream signal.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: March 12, 2002
    Assignee: Sarnoff Corporation
    Inventors: Paul Wallace Lyons, Alfonse Anthony Acampora, John Prickett Beltz, Victor Vincent D'Alessandro, Clifford Arthur Pecota
  • Patent number: 6266384
    Abstract: An apparatus and method for receiving a bitstream containing timing information and respective program information, the program information is processed and associated with locally generated timing information to form an output bitstream, the locally generated timing information is synchronized to the received timing information so that the timing relationships of the received program information are preserved even after the program information is processed.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: July 24, 2001
    Assignee: Sarnoff Corporation
    Inventors: Alfonse Anthony Acampora, Victor Vincent D'Alessandro, Charles Martin Wine
  • Patent number: 5729292
    Abstract: A method is disclosed for optimizing the operation of a packet transport system generating a packet stream carrying a plurality of component signals, and includes the following steps. First the packet stream is partitioned into successive groups, each group containing a predetermined number of packet slots. A plurality of lists are maintained, one associated with each packet slot in a group. A packet stream is generated by placing data representing a component signal selected in response to entries in the list associated with that packet slot into the packet slot. The contents of the plurality of lists are updated based on a predetermined parameter.
    Type: Grant
    Filed: December 21, 1995
    Date of Patent: March 17, 1998
    Assignee: Thomson Multimedia, S.A.
    Inventors: Alfonse Anthony Acampora, Richard Michael Bunting, Steven Kennedy Evans, Paul Wallace Lyons, Nicola John Fedele, Victor Vincent D'Alessandro