Patents by Inventor Vincent E. Cavanna
Vincent E. Cavanna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9755907Abstract: In a method for managing a switch fabric comprising a plurality of fabric chips, each of said plurality of fabric chips comprising a plurality of port interfaces, a first configuration set and a second configuration set, each comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, are generated. In addition, a determination as to which of the first configuration set and the second configuration set the plurality of fabric chips are to use is made an instruction is communicated to each of the fabric chips to use the determined one of the first configuration set and the second configuration set.Type: GrantFiled: September 28, 2011Date of Patent: September 5, 2017Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPInventors: Vincent E. Cavanna, Michael G. Frey
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Patent number: 9479391Abstract: In a method for implementing a switch fabric, in a first fabric chip, a packet comprising an identification of a destination node chip is received from a source fabric chip, and a determination that a first path in the switch fabric along which the packet is to be communicated toward the destination node chip is unavailable is made. In addition, a determination as to whether another path along which the packet is to be communicated toward the destination node chip that does not include the source fabric chip is available is made. In response to a determination that the another path is available, the packet is communicated along the another path. In addition, in response to a determination that the another path is unavailable, the packet is communicated back to the source fabric chip.Type: GrantFiled: September 28, 2011Date of Patent: October 25, 2016Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPInventors: Michael G. Frey, Vincent E. Cavanna
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Patent number: 9369296Abstract: A fabric chip includes a plurality of port interfaces, in which each of the plurality of port interfaces includes a network chip interface (NCI) block having a port resolution module to determine which of the port interfaces is to receive a packet from the NCI block and a crossbar block communicatively coupled with each of the NCI blocks in the plurality of port interfaces. In addition, at least two of the plurality of port interfaces are to be connected to at least two port interfaces of another fabric chip as trunked links of a trunk. Moreover, the NCI blocks of the at least two of the plurality of port interfaces include a resource that keeps track of the port interfaces in the fabric chip that are connected to the trunk links of the trunk.Type: GrantFiled: August 8, 2011Date of Patent: June 14, 2016Assignee: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LPInventors: Michael G. Frey, Vincent E. Cavanna, Trevor Joseph Switkowski
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Publication number: 20140211630Abstract: In a method for managing packet flow in a switch fabric comprising a plurality of fabric chips, wherein a packet comprises a counter, a determination as to whether the packet has been detoured around an unavailable fabric link and a determination as to whether the packet is making forward progress are made. In addition, a value of the counter in the packet is modified in response to a determination that the packet has been detoured around an unavailable fabric link and a determination that forward progress is not being made.Type: ApplicationFiled: September 28, 2011Publication date: July 31, 2014Inventors: Vincent E. Cavanna, Michael G. Frey
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Publication number: 20140211609Abstract: In a method for implementing a switch fabric, in a first fabric chip, a packet comprising an identification of a destination node chip is received from a source fabric chip, and a determination that a first path in the switch fabric along which the packet is to be communicated toward the destination node chip is unavailable is made. In addition, a determination as to whether another path along which the packet is to be communicated toward the destination node chip that does not include the source fabric chip is available is made. In response to a determination that the another path is available, the packet is communicated along the another path. In addition, in response to a determination that the another path is unavailable, the packet is communicated back to the source fabric chip.Type: ApplicationFiled: September 28, 2011Publication date: July 31, 2014Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Michael G. Frey, Vincent E. Cavanna
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Publication number: 20140198631Abstract: In a method for managing a switch fabric comprising a plurality of fabric chips, each of said plurality of fabric chips comprising a plurality of port interfaces, a first configuration set and a second configuration set, each comprising a plurality of configuration registers for the port interfaces to use in calculating a port resolution for an incoming packet, are generated. In addition, a determination as to which of the first configuration set and the second configuration set the plurality of fabric chips are to use is made an instruction is communicated to each of the fabric chips to use the determined one of the first configuration set and the second configuration set.Type: ApplicationFiled: September 28, 2011Publication date: July 17, 2014Inventors: Vincent E. Cavanna, Michael G. Frey
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Publication number: 20140112125Abstract: A fabric chip includes a plurality of port interfaces, in which each of the plurality of port interfaces includes a network chip interface (NCI) block having a port resolution module to determine which of the port interfaces is to receive a packet from the NCI block and a crossbar block communicatively coupled with each of the NCI blocks in the plurality of port interfaces. In addition, at least two of the plurality of port interfaces are to be connected to at least two port interfaces of another fabric chip as trunked links of a trunk. Moreover, the NCI blocks of the at least two of the plurality of port interfaces include a resource that keeps track of the port interfaces in the fabric chip that are connected to the trunk links of the trunk.Type: ApplicationFiled: August 8, 2011Publication date: April 24, 2014Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Michael G. Frey, Vincent E. Cavanna, Trevor Joseph Switkowski
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Publication number: 20140098810Abstract: A fabric chip includes a plurality of port interfaces, wherein each of the plurality of port interfaces includes a network chip interface (NCI) block having a port resolution module, and wherein the port resolution module is to determine which of the port interfaces is to receive a packet from the NCI block, and a crossbar block communicatively coupled with each of the NCI blocks in the plurality of port interfaces.Type: ApplicationFiled: August 8, 2011Publication date: April 10, 2014Inventors: Michael G. Frey, Vincent E Cavanna
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Patent number: 7908470Abstract: The present invention provides a controller that allows plural processor nodes to access plural boot memories concurrently.Type: GrantFiled: October 31, 2006Date of Patent: March 15, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventor: Vincent E. Cavanna
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Patent number: 7760530Abstract: Systems, devices, and methods, including executable instructions are provided for resolving content addressable memory (CAM) match address priority. One method includes retaining a first match address as the best match address. Subsequent match addresses are compared to the retained best match address, each match address being associated with a compare cycle during which a selected columnar portion of each CAM entry is compared to a corresponding portion of a search term. The best match address is updated as a result of the comparison.Type: GrantFiled: June 4, 2007Date of Patent: July 20, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Vincent E. Cavanna, Mark Gooch, John A. Wickeraad
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Publication number: 20080301362Abstract: Systems, devices, and methods, including executable instructions are provided for resolving content addressable memory (CAM) match address priority. One method includes retaining a first match address as the best match address. Subsequent match addresses are compared to the retained best match address, each match address being associated with a compare cycle during which a selected columnar portion of each CAM entry is compared to a corresponding portion of a search term. The best match address is updated as a result of the comparison.Type: ApplicationFiled: June 4, 2007Publication date: December 4, 2008Inventors: Vincent E. Cavanna, Mark Gooch, John A. Wickeraad