Patents by Inventor Vincent M. McNeil

Vincent M. McNeil has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6093659
    Abstract: A method for forming an integrated circuit having multiple gate oxide thicknesses is disclosed herein. The circuit (10) is processed up to gate oxide formation. A pattern (36) is then formed exposing areas of the circuit where a thinner gate oxide (20) is desired. These areas are then implanted with a halogen species such as fluorine or chlorine, to retard oxidation. The pattern (36) is then removed and an oxidation step is performed. Oxidation is selectively retarded in areas (14) previously doped with the halogen species but not in the remaining areas (12). Thus, a single oxidation step may be used to form gate oxides (20,22) of different thicknesses.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: July 25, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Douglas T. Grider, Vincent M. McNeil
  • Patent number: 5793083
    Abstract: A technique for providing a design window for scaled technologies in which good electrostatic discharge/electrical over stress damage and optimum transistor operation can be achieved without the use of additional masks or design steps. The M, beta, and R.sub.sub parameters of the NMOS transistor 13 and associated parasitic npn transistor 10 are selected to provide the design window.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: August 11, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: E. Ajith Amerasekera, Vincent M. McNeil, Mark S. Rodder
  • Patent number: 5129981
    Abstract: The present invention relates to a method of forming thin bodies of a semiconductor material, such as single crystalline silicon, by selectively etching away a portion of the body until a body of the desired thicknes is obtained. The body includes a p-n junction made up of adjacent regions of p-type and n-type conductivity which are immersed in a chemical etchant with the surface of the p-type region being exposed to the etchant. A time varying voltage waveform having first and second voltage levels is applied through the etchant to the p-n junction. The first voltage level causes a zero forward bias across the p-n junction and the second voltage level causes a reverse bias across the p-n junction. The p-type region is removed by the chemical etchant down to the n-type region.
    Type: Grant
    Filed: March 14, 1991
    Date of Patent: July 14, 1992
    Assignees: General Motors Corporation, Massachusetts Institute of Technology
    Inventors: Su-Chee S. Wang, Vincent M. McNeil, Martin A. Schmidt
  • Patent number: 5129982
    Abstract: A method of selectively etching a body of a semiconductor material, such as single crystalline silicon, having regions of n-type and p-type conductivity to remove at least a portion of the n-type region. The body is placed in an etching solution of an etchant having a high pH value and a positive voltage is applied between the body and the etchant. This forms passivating layers on the surfaces of the two regions with the passivating layer on the n-type region being different from that on the p-type region. The voltage is then removed and the body is etched for a period long enough to remove all of the passivating layer from the n-type region and at least a portion of the n-type region, but is not long enough to remove all of the passivating layer from the p-type region. This is allowed by the difference between the passivating layers on the two regions. The steps of forming the passivating layers and etching them is repeated until a desired amount of the n-type region is removed.
    Type: Grant
    Filed: March 15, 1991
    Date of Patent: July 14, 1992
    Assignees: General Motors Corporation, Massachusetts Institute of Technology
    Inventors: Su-Chee S. Wang, Vincent M. McNeil, Martin A. Schmidt