Abstract: A mechanism for dealing with faster clock speeds by increasing the pulse width of the pump-up and pump-down pulses of a Hogge-type phase detector without dividing the clock. In particular, the NRZ data stream is divided into two, interleaved data streams which are provided through two series of flip-flops. By connecting the exclusive-OR gates separately to the two series of flip-flops to generate the pump-up and pump-down pulses, a longer time between transitions can be achieved by having alternate transitions (up and down) used by the two different series of flip-flops. In addition, delay circuits are provided to compensate for the clock-to-data output delay of the flip-flops.

Abstract: A mechanism for dealing with faster clock speeds by increasing the pulse width of the pump-up and pump-down pulses of a Hogge-type phase detector without dividing the clock. In particular, the NRZ data stream is divided into two, interleaved data streams which are provided through two series of flip-flops. By connecting the exclusive-OR gates separately to the two series of flip-flops to generate the pump-up and pump-down pulses, a longer time between transitions can be achieved by having alternate transitions (up and down) used by the two different series of flip-flops. In addition, delay circuits are provided to compensate for the clock-to-data output delay of the flip-flops.

Abstract: A converting circuit which converts RZ data into intermeidate NRZ data. The intermediate NRZ data is then sampled to detect a phase of the intermediate NRZ data, which corresponds to the phase of the RZ data. In a preferred embodiment, the converting circuit is incorporated in a modified Hogge NRZ phase detector. A toggle flip-flop is placed in front of the Hogge phase detector. Since the toggle flip-flop is triggered by the leading edge of the RZ pulse, it essentially converts the RZ data into intermediate NRZ data. An exclusive-OR gate samples two different output stages of the Hogge NRZ phase detector, with the output stages being separated by an interim stage to provide a clock delay. The output of the exclusive-OR gate is an intermediate NRZ signal that corresponds to the input RZ data stream, which can then be sampled. The exclusive-OR gates inside the Hogge phase detector are used, as in the Hogge phase detector, to produce the up and down signals provided to a charge pump that is part of a PLL.