Abstract: A nonvolatile memory device includes a discharge circuit configured to selectively connect circuit nodes to discharge terminals through corresponding discharge paths, and an accumulation device for accumulating electric charge. A driving circuit is for driving the discharge circuit in such a way to connect at least a part of such circuit nodes to the discharge terminals if the value of the external supply voltage falls below a corresponding threshold. A supply circuit is for supplying the driving circuit with an intermediate supply voltage. Each one of the intermediate supply voltages is the corresponding external supply voltage when the value of the external supply voltage is higher than the corresponding threshold, or it is an internal voltage locally generated by the supply circuit by exploiting the electric charge stored by the accumulation device when the value of the external supply voltage is lower than the corresponding threshold.

Abstract: A nonvolatile memory device includes a discharge circuit configured to selectively connect circuit nodes to discharge terminals through corresponding discharge paths, and an accumulation device for accumulating electric charge. A driving circuit is for driving the discharge circuit in such a way to connect at least a part of such circuit nodes to the discharge terminals if the value of the external supply voltage falls below a corresponding threshold. A supply circuit is for supplying the driving circuit with an intermediate supply voltage. Each one of the intermediate supply voltages is the corresponding external supply voltage when the value of the external supply voltage is higher than the corresponding threshold, or it is an internal voltage locally generated by the supply circuit by exploiting the electric charge stored by the accumulation device when the value of the external supply voltage is lower than the corresponding threshold.

Abstract: A method of designing and fabricating a control unit for electronic microcontrollers or microprocessors that includes fabricating a finite state machine having at least one combinatorial network, the finite state machine having a plurality of control subunits, each control subunit structured to correspond to one combinatorial logic network. Each unit in the plurality of control subunits is independently connected to an arbitration block to provide information about a possible future state and to receive a present state command.

Abstract: A method of designing and fabricating a control unit for electronic microcontrollers or microprocessors that includes fabricating a finite state machine having at least one combinatorial network, the finite state machine having a plurality of control subunits, each control subunit structured to correspond to one combinatorial logic network. Each unit in the plurality of control subunits is independently connected to an arbitration block to provide information about a possible future state and to receive a present state command.

Abstract: A method of fabricating or designing a control unit for electronic microcontrollers or microprocessors that includes fabricating a finite state machine having at least one combinatorial network, the finite state machine having a plurality of control sub-units, each structured to correspond to one combinatorial logic network. Each unit in the plurality of control sub-units is independently connected to an arbitration block to provide information about a possible future state and receive a present state command.

Abstract: Method and apparatus of parallel processing of multiple inference rules organized in fuzzy sets or logical functions of multiple fuzzy sets including membership functions defined in a so-called universe of discourse. The inference rules are configured essentially as IF-THEN rules with at least one antecedent preposition and at least one consequent implication. The prepositions have at least one term of comparison between membership functions and a plurality of input data and each term is separated by logical operators. The method associates with the logical operators maximum and minimum operations among two or more elements and calculates exhaustively the overall degree of truth (&OHgr;) of a rule with a maximum or minimum of N partial truth levels. The method is accomplished by a plurality of identical, parallel inferential processors. Each inferential processor determines a preposition or a partial truth level of a preposition.

Abstract: An apparatus over or under approximates the result of dividing a binary number representing an integer 2n. The division by 2n is performed by truncating the n least significant bits of the integer. In order to over or under approximate the result, the nth truncated bit, i.e., the most significant bit of the n-truncated less significant bits, is added to the integer represented by the remaining non-truncated bits.

Abstract: A method for storing a membership function, include storing a position of a vertex of a triangle that defines the membership function in a universe of discourse and storing a first distance between the position of the vertex a point of intersection between a left side of the triangle and an axis of the universe of discourse. Further, the method includes storing a second distance between the position of the vertex and point of intersection between right side of the triangle and the axis of the universe of discourse. The present invention furthermore relates to a circuit for calculating a grade of membership of an antecedent of a fuzzy rule, and is adapted to fuzzyfy an input variable by adopting the geometric proportions that occur between homologous sides of similar triangles defined by the position of the input value in the universe of discourse.

Abstract: A method for storing a membership function, include storing a position of a vertex of a triangle that defines the membership function in a universe of discourse and storing a first distance between the position of the vertex a point of intersection between a left side of the triangle and an axis of the universe of discourse. Further, the method includes storing a second distance between the position of the vertex and point of intersection between right side of the triangle and the axis of the universe of discourse. The present invention furthermore relates to a circuit for calculating a grade of membership of an antecedent of a fuzzy rule, and is adapted to fuzzify an input variable by adopting the geometric proportions that occur between homologous sides of similar triangles defined by the position of the input value in the universe of discourse.

Abstract: A voltage level shift circuit has a first input receiving a first voltage signal and a second input receiving a second voltage signal. The voltage level shift circuit is structured to generate an output voltage at an output terminal which is equal to a sum of the first and second voltage signals. The first voltage signal may be varied to vary a shift of the second voltage signal.

Abstract: Method and apparatus of parallel processing of multiple inference rules organized in fuzzy sets or logical functions of multiple fuzzy sets including membership functions defined in a so-called universe of discourse. The inference rules are configured essentially as IF-THEN rules with at least one antecedent preposition and at least one consequent implication. The prepositions have at least one term of comparison between membership functions and a plurality of input data and each term is separated by logical operators. The method associates with the logical operators maximum and minimum operations among two or more elements and calculates exhaustively the overall degree of truth (.OMEGA.) of a rule with a maximum or minimum of N partial truth levels. The method is accomplished by a plurality of identical, parallel inferential processors. Each inferential processor determines a preposition or a partial truth level of a preposition.

Abstract: A method and system for processing a plurality of fuzzy logic rules. The system includes a plurality of fuzzy logic lines, each fuzzy logic line corresponding to one of the fuzzy logic rules and including a calculating device. Each calculating device has an input terminal for receiving a series of weights and an output terminal for outputting an overall truth value according to the received series of weights and at least one logical operator of the fuzzy logic rule corresponding to the fuzzy logic line. The system further includes processing circuitry coupled to each fuzzy logic line, for receiving the overall truth value from each line, and outputting a fuzzy logic value according to the received overall truth values.