Abstract: An interfabric link between two separate Fibre Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. This translation is preferably done using a private to public loop address translation. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. The virtual switches are then interconnected using private loops. The use of the private loop is enabled by the presence of translation logic which converts fabric addresses to loop addresses and back so that loop and fabric devices can communicate.

Abstract: An interfabric link between two separate Fibre Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. This translation is preferably done using a private to public loop address translation. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. The virtual switches are then interconnected using private loops. The use of the private loop is enabled by the presence of translation logic which converts fabric addresses to loop addresses and back so that loop and fabric devices can communicate.

Abstract: An interfabric link between two separate Fiber Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. This translation is preferably done using a private to public loop address translation. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. The virtual switches are then interconnected using private loops. The use of the private loop is enabled by the presence of translation logic which converts fabric addresses to loop addresses and back so that loop and fabric devices can communicate.

Abstract: One embodiment of the present invention provides a system that facilitates traffic isolation (TI) in a network. During operation, the system configures a set of switch ports as members of a TI zone. The switch ports are part of an end-to-end path across one or more switch domains between a source and a destination. The switch ports within the TI zone and outside the TI Zone belong to a common storage area network (SAN) zone which compartmentalizes data for security purposes. The system then determines whether a data flow entering a switch domain belongs to the TI zone. The system subsequently forwards the data flow to the next port within the TI zone if the data flow belongs to the TI zone.

Abstract: An interfabric link between two separate Fibre Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. This translation is preferably done using a private to public loop address translation. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. The virtual switches are then interconnected using private loops. The use of the private loop is enabled by the presence of translation logic which converts fabric addresses to loop addresses and back so that loop and fabric devices can communicate.

Abstract: Techniques are provided for monitoring and diagnosis of a network comprising one or more devices. In some embodiments, techniques are provided for gathering network information, analyzing the gathered information to identify correlations, and for diagnosing a problem based upon the correlations. The diagnosis may identify a root cause of the problem. In certain embodiments, a computing device may be configurable to determine a first event from information, allocate a first event to a first cluster, the first cluster is from one or more clusters of events, based on a set of attributes for the first event, and determine a set of attributes for the first cluster, and rank the first cluster against the other clusters from the one or more clusters of events based on the set of attributes for the first cluster. The set of attributes may be indicative of the relationship between events in the cluster.

Abstract: An interfabric link between two separate Fiber Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. In a second embodiment the external ports are configured as NL_ports and the connections between the virtual switches are E_ports. The virtual switches in the interfabric switch match domains with their external counterparts so that the virtual switches effectively form their own fabric.

Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.

Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.

Abstract: Certain embodiments enable resources assigned or allocated to an operating virtual machine (VM) to be modified while the VM is operating and without having to stop, restart, or reboot the VM. The modification may correspond to increasing or decreasing the amount of a resource being assigned to the VM. In this manner, resources assigned to a VM at the time of creation of the VM are not static and can instead be dynamically changed while the VM is operating without having to stop, reboot, or restart the VM. In some embodiments, the changes to the resources allocated to one or more VMs provided for a user (e.g., a customer) may be made according to or in response to a Service Level Agreement (SLA) entered into by the user, in response to an event such as a failover or switchover event, and the like.

Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.

Abstract: One embodiment of the present invention provides a system that facilitates end-to-end quality of service (QoS) between a source and a destination in a network. During operation, the system allocates virtual channels on an output port of a switch to a number of quality of service (QoS) levels. The system further assigns a virtual channel to a traffic flow based on a QoS zone, wherein the QoS zone is identified by a host identifier, a target identifier, and a QoS level of the traffic flow. In addition, the system forwards data frames in the traffic flow via the assigned virtual channel.

Abstract: An interfabric link between two separate Fibre Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. In a second embodiment the external ports are configured as NL_ports and the connections between the virtual switches are E_ports. The virtual switches in the interfabric switch match domains with their external counterparts so that the virtual switches effectively form their own fabric.

Abstract: An interfabric link between two separate Fibre Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. In a second embodiment the external ports are configured as NL_ports and the connections between the virtual switches are E_ports. The virtual switches in the interfabric switch match domains with their external counterparts so that the virtual switches effectively form their own fabric.

Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.

Abstract: An interfabric link between two separate Fibre Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. This translation is preferably done using a private to public loop address translation. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. The virtual switches are then interconnected using private loops. The use of the private loop is enabled by the presence of translation logic which converts fabric addresses to loop addresses and back so that loop and fabric devices can communicate.

Abstract: One embodiment of the present invention provides a switching system that facilitates data flow monitoring at the logical-unit level. The switching system includes a traffic monitoring mechanism configured to monitor a data flow between a host and a logical unit residing on a target device. The switching system further includes a storage mechanism configured to store data-flow statistics specific to the host and the logical unit and a communication mechanism configured to communicate the data-flow statistics to a traffic management module.

Abstract: An interfabric link between two separate Fibre Channel fabrics so that devices in one fabric can communicate with devices in another fabric without requiring the merger of the two fabrics. The interfabric switch performs a conversion or a translation of device addresses in each fabric so that they are accessible to the other fabric. This translation is preferably done using a private to public loop address translation. In a first embodiment the external ports of the interfabric switch are configured as E_ports. A series of internal ports in each interfabric switch are joined together forming a series of virtual or logical switches. The virtual switches are then interconnected using private loops. The use of the private loop is enabled by the presence of translation logic which converts fabric addresses to loop addresses and back so that loop and fabric devices can communicate.