Patents by Inventor Virender Kashyap

Virender Kashyap has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10372037
    Abstract: A computer-implemented method for constructing a design characterized by a double patterning layer is presented. The method includes receiving the design in a memory of the computer when the computer is invoked to construct the design. The method further includes generating, using the computer, a multitude of fill shapes along a multitude of tracks associated with a multitude of net shapes. The multitude of fill shapes and the multitude of net shapes are decomposable into two colors in accordance with a spacing constraint of the double patterning layer.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: August 6, 2019
    Assignee: SYNOPSYS, INC.
    Inventors: Himanshu Sharma, Byungwook Kim, Virender Kashyap, Abhishek Khandelwal
  • Publication number: 20170124242
    Abstract: A computer-implemented method for constructing a design characterized by a double patterning layer is presented. The method includes receiving the design in a memory of the computer when the computer is invoked to construct the design. The method further includes generating, using the computer, a multitude of fill shapes along a multitude of tracks associated with a multitude of net shapes. The multitude of fill shapes and the multitude of net shapes are decomposable into two colors in accordance with a spacing constraint of the double patterning layer.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventors: Himanshu Sharma, Byungwook Kim, Virender Kashyap, Abhishek Khandelwal