Patents by Inventor Virendra V. Rana

Virendra V. Rana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100323503
    Abstract: Embodiments of the present invention provide a method for forming an emitter region in a crystalline silicon substrate and passivating the surface thereof by depositing a doped amorphous silicon layer onto the crystalline silicon substrate and thermally annealing the crystalline silicon substrate while oxidizing the surface thereof. In one embodiment, the deposited film is completely converted to oxide. In another embodiment, the doped amorphous silicon layer deposited onto the crystalline silicon substrate is converted into crystalline silicon having the same grain structure and crystal orientation as the underlying crystalline silicon substrate upon which the amorphous silicon was initially deposited during emitter formation. In one embodiment, at least a portion of the converted crystalline silicon is further converted into silicon dioxide during the emitter surface passivation.
    Type: Application
    Filed: August 31, 2010
    Publication date: December 23, 2010
    Inventors: Virendra V. Rana, Robert Z. Bachrach
  • Patent number: 7846762
    Abstract: Embodiments of the present invention provide a method for forming an emitter region in a crystalline silicon substrate and passivating the surface thereof by depositing a doped amorphous silicon layer onto the crystalline silicon substrate and thermally annealing the crystalline silicon substrate while oxidizing the surface thereof. In one embodiment, the deposited film is completely converted to oxide. In another embodiment, the doped amorphous silicon layer deposited onto the crystalline silicon substrate is converted into crystalline silicon having the same grain structure and crystal orientation as the underlying crystalline silicon substrate upon which the amorphous silicon was initially deposited during emitter formation. In one embodiment, at least a portion of the converted crystalline silicon is further converted into silicon dioxide during the emitter surface passivation.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: December 7, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Virendra V. Rana, Robert Z. Bachrach
  • Publication number: 20100304522
    Abstract: A front contact thin-film solar cell is formed on a thin-film crystalline silicon substrate. Emitter regions, selective emitter regions, and a back surface field are formed through ion implantation processes. In yet another embodiment, a back contact thin-film solar cell is formed on a thin-film crystalline silicon substrate. Emitter regions, selective emitter regions, base regions, and a front surface field are formed through ion implantation processes.
    Type: Application
    Filed: May 5, 2010
    Publication date: December 2, 2010
    Applicant: SOLEXEL, INC.
    Inventors: Virendra V. Rana, Pawan Kapur, Mehrdad M. Moslehi
  • Publication number: 20100227431
    Abstract: A method is provided for making a crystalline silicon solar cell on a low purity substrate by depositing p+-p-n+, or n+-n-p+ layers of amorphous silicon, depending on the type of wafer, on a crystalline silicon substrate, such as an upgraded metallurgical grade silicon substrate, with substrate vias of varying diameters formed thereon, annealing the stack of amorphous silicon layers to cause solid phase epitaxial crystallization, and metallizing the substrate assembly using standard metallization techniques. One embodiment of the present invention provides depositing a passivation layer onto the third deposited silicon layer subsequent to the crystallization. Another embodiment provides depositing a passivation layer on the back side of the substrate subsequent to crystallization and punching selected regions at the substrate vias prior to back metallization.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 9, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventor: VIRENDRA V. RANA
  • Publication number: 20100075485
    Abstract: Embodiments of the present invention provide a method for forming an emitter region in a crystalline silicon substrate and passivating the surface thereof by depositing a doped amorphous silicon layer onto the crystalline silicon substrate and thermally annealing the crystalline silicon substrate while oxidizing the surface thereof. In one embodiment, the deposited film is completely converted to oxide. In another embodiment, the doped amorphous silicon layer deposited onto the crystalline silicon substrate is converted into crystalline silicon having the same grain structure and crystal orientation as the underlying crystalline silicon substrate upon which the amorphous silicon was initially deposited during emitter formation. In one embodiment, at least a portion of the converted crystalline silicon is further converted into silicon dioxide during the emitter surface passivation.
    Type: Application
    Filed: September 22, 2008
    Publication date: March 25, 2010
    Inventors: Virendra V. Rana, Robert Z. Bachrach
  • Patent number: 7569462
    Abstract: The present invention provides a method of recrystallizing a silicon sheet, and in particular recrystallizing a small grained silicon sheet to improve material properties such as grain size and orientation. According to one aspect, the method includes using rapid thermal processing (RTP) to melt and recrystallize one or more entire silicon sheet(s) in one heating sequence. According to another aspect, the method includes directionally controlling a temperature drop across the thickness of the sheet so as to facilitate the production of a small number of nuclei in the melted material and their growth into large grains. According to a further aspect, the invention includes a re-crystallization chamber in an overall process flow that enables high-throughput processing of silicon sheets having desired properties for applications such as photovoltaic modules.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: August 4, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Virendra V. Rana, Robert Z. Bachrach
  • Publication number: 20090110808
    Abstract: The present invention provides a method of making back side contacts and back surface fields in photovoltaic devices such as silicon solar cells. According to one aspect, the process of the present invention is a non-contact process, overcoming many of the problems of the prior art. According to certain aspects, molten aluminum is used to form the contact regions as opposed to the screen printing process of the prior art. According to additional aspects, the process can be used to form the distributed point contacts and localized back surface fields for dielectric passivated back surface. According to still further aspects, molten aluminum spray and/or atomization is used for the back side metallization.
    Type: Application
    Filed: October 24, 2007
    Publication date: April 30, 2009
    Inventors: Virendra V. Rana, Robert Z. Bachrach
  • Publication number: 20080142763
    Abstract: The present invention provides a method of recrystallizing a silicon sheet, and in particular recrystallizing a small grained silicon sheet to improve material properties such as grain size and orientation. According to one aspect, the method includes using rapid thermal processing (RTP) to melt and recrystallize one or more entire silicon sheet(s) in one heating sequence. According to another aspect, the method includes directionally controlling a temperature drop across the thickness of the sheet so as to facilitate the production of a small number of nuclei in the melted material and their growth into large grains. According to a further aspect, the invention includes a re-crystallization chamber in an overall process flow that enables high-throughput processing of silicon sheets having desired properties for applications such as photovoltaic modules.
    Type: Application
    Filed: December 13, 2006
    Publication date: June 19, 2008
    Inventors: Virendra V. Rana, Robert Z. Bachrach