Abstract: The present invention provides distortion compensating of an analog signal which is quantized by an A/D converter. A dither device processes a clock signal from a clock signal generator to provide an output signal with a known dither pattern. The output signal with the dither pattern has a plurality of different frequencies that are periodically repeated. In addition, the same frequency of respective cycles of the dither pattern has different phases. The dither signal is superimposed on the analog signal, thus, distortion of the analog signal is compensated or reduced subsequent to A/D conversion. In particular, this dithered analog signal may be converted into a digital signal in response to the clock signal which is used to generate the dither so that the digital signal approximates to the analog signal much more closely than if the equivalent digital signal were obtained by conventional analog to digital conversion.

Abstract: The present invention provides distortion compensating of an analog signal. A dither device processes a clock signal from a clock signal generator to provide an output signal with a dither pattern. The output signal with the dither pattern has a plurality of different frequencies that are periodically repeated. In addition, the same frequency of respective cycles of the dither pattern has different phases. The dither signal is further superimposed on the analog signal. Thus, distortion of the composite analog signal is compensated. In particular, this dither analog signal may be converted into a digital signal in response to the clock signal so that the digital signal approximates to the analog signal much more than the digital signal obtained by conventional analog to digital converting.

Abstract: This invention is a method and apparatus for passing quantized electronic signals of a given quantizing resolution through processing systems which have a quantizing accuracy less than that which the electronic signal is quantized to. The invention includes truncating the quantized signal to a given precision matching the precision of the processing system, and offsetting the truncated signal by a predetermined amount, normally 1 LSB, in a predetermined and predictable manner. The offsetting is preferred to occur in a regular pattern which is changed in response to the values of the bits which are discarded in the truncation.