Patents by Inventor Vishnu Balan

Vishnu Balan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6642791
    Abstract: An amplifier circuit includes a first input device coupled to a first input node and controlling a first current, a second input device coupled to a second input node and controlling a second current, a current source device coupled to a bias node and controlling a summed current of the first and second currents, a current mirror circuit, a first feedback circuit, a second feedback circuit, and a capacitor. The current mirror circuit generates a load current by mirroring the first current so as to provide an output signal voltage to an output node couple to the second output node. The first feedback circuit supplies a mirrored first current to the bias node, and the second feedback circuit pulls a mirrored second current from the bias node. The capacitor is coupled to the bias node and provides the bias voltage to the current source device.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: November 4, 2003
    Assignee: LSI Logic Corporation
    Inventor: Vishnu Balan
  • Patent number: 6271725
    Abstract: A low voltage bipolar transconductor circuit with extended dynamic range is disclosed. The transconductance circuit provides a differential current output signal and generally comprises a first and a second differential pair of transistors coupled to a differential input signal and to a load, and having transistors area ratios of 1:r and r:1, respectively. The transconductance circuit further comprises at least one first pair of diodes having positive nodes coupled to each other and to the load, negative nodes coupled to the first differential transistors, and a diode area ratio of r:1, and a least one second pair of diodes having positive nodes coupled to each other and to the load, negative nodes coupled to the second differential transistors, and having a diode area ratio of 1:r.
    Type: Grant
    Filed: August 25, 1999
    Date of Patent: August 7, 2001
    Assignee: LSI Logic Corporation
    Inventors: Narendra M. K. Rao, Vishnu Balan
  • Patent number: 6184748
    Abstract: A low power, high performance circuit for magnitude and group delay shaping in continuous-time read channel filters is disclosed. The circuit generally comprises a first and a second biquadratic circuit, each having an input, a band pass, and a output low pass node, where the second biquadratic input node is coupled to the first biquadratic output node, and a first and second transconductor coupled to the first biquadratic band pass node and also to the second biquadratic band pass and low pass output nodes, respectively. The first and second transconductors are preferably programmable transconductors.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: February 6, 2001
    Assignee: LSI Logic Corporation
    Inventors: Narendra M. K. Rao, Vishnu Balan