Abstract: An integrated circuit including at least one circuit node, multiple duplicate circuit blocks integrated on the integrated circuit in close proximity with each other, each including at least one device that is susceptible to random telegraph noise (RTN), and a switch circuit that swaps electrical coupling of the duplicate circuit blocks, one at a time, to the at least one circuit node in sequential cycles of a clock signal. The duplicate circuit blocks may be large functional blocks, such as an oscillator or a comparator or the like, or limited to circuits including RTN susceptible devices, such as differential pairs or the like. Each duplicate circuit block may include any number of connections for coupling to corresponding circuit nodes. The swapping may further include chopping in which multiple inputs are swapped with each other while multiple outputs are swapped with each other in consecutive clock cycles.

Abstract: A crystal driver integrated circuit with external oscillation signal amplitude control including an amplifier core, an input pin and an output pin, an adjustable capacitor, and a controller. The controller operates the amplifier core in any one of multiple operating modes including an oscillator mode and a bypass mode. During the bypass mode, the controller disables the amplifier core and adjusts the adjustable capacitor so that an amplitude of an oscillation signal received via the input pin from an external oscillator has a target amplitude. The external oscillation signal may be capacitively coupled for capacitive voltage division or directly coupled for impedance attenuation. An available voltage may be provided as a source voltage to the external oscillator via the output pin. An internal voltage regulator and/or switch may be included to re-provision the output pin to provide the source voltage during the bypass mode.

Abstract: An oscillation circuit including a crystal interface for coupling to a crystal, a crystal amplifier that drives the crystal to establish oscillation, a memory, a timing circuit, a level detector that provides an amplitude indication when an oscillation achieves a programmable threshold, and a controller. The controller applies one or more settings including gain and activates the crystal amplifier, measures the startup time, and calculates startup energy. The startup energy is based on a bias current of the crystal amplifier, remaining system current, and the startup time. The settings may include a gain setting of the crystal amplifier and one or more thresholds used by the threshold detector. The controller adjusts the settings for multiple startups, and determines optimal settings for minimizing the startup energy. The memory stores the optimal settings along with robust settings that may be used on a one-time basis in the event of startup failure.

Abstract: A crystal driver integrated circuit with external oscillation signal amplitude control including an amplifier core, an input pin and an output pin, an adjustable capacitor, and a controller. The controller operates the amplifier core in any one of multiple operating modes including an oscillator mode and a bypass mode. During the bypass mode, the controller disables the amplifier core and adjusts the adjustable capacitor so that an amplitude of an oscillation signal received via the input pin from an external oscillator has a target amplitude. The external oscillation signal may be capacitively coupled for capacitive voltage division or directly coupled for impedance attenuation. An available voltage may be provided as a source voltage to the external oscillator via the output pin. An internal voltage regulator and/or switch may be included to re-provision the output pin to provide the source voltage during the bypass mode.

Abstract: In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.

Abstract: In one example, a semiconductor die includes multi-standard, multi-channel expandable television/satellite receiver that can be flexibly implemented in a number of different configurations to enable incorporation into a plurality of different systems. The semiconductor die may include multiple tuners to receive and tune a terrestrial radio frequency (RF) signal and a satellite RF signal. These tuners may include different frequency synthesizers including voltage controlled oscillators (VCOs) to generate VCO signals at different frequencies, mixers to downconvert the RF signals to baseband signals using the VCO signals. In an implementation, the semiconductor die may further include shared circuitry coupled to the tuners to digitize, process and demodulate the baseband signals.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: Die-to-die communication links for receiver integrated circuit dies within multi-die systems and related methods are disclosed for radio frequency (RF) receivers. The disclosed embodiments provide die-to-die communication links that allow for direct communication of operating parameters between receiver integrated circuit dies and other integrated circuit dies within a multi-die system so that the operation of receive path circuitry can be adjusted without requiring intervention from an external host processor integrated circuit. A variety of operating parameter information can be communicated through the die-to-die communication links so that the integrated circuit dies can quickly adjust to changing signal conditions without requiring intervention by the external host processor integrated circuit.

Abstract: Systems and methods are disclosed for MCM (multiple chip module) packages having multiple stacked demodulator dies that share one or more MCM pins. The shared pins can include clock generation pins, clock input/output pins, receive signal path input pins, voltage supply pins, ground supply pins, and/or any other desired pins. In addition to reducing footprint sizes for printed circuit board (PCB) applications, the multi-demodulator MCM package embodiments described herein also allow for improved routing of connection traces on PCBs.

Abstract: In one form, a multi-chip module for a multi-mode receiver includes an MCM substrate and first and second demodulator die. The MCM substrate has first and second satellite input ports, first and second terrestrial/cable input ports, and first and second transport stream ports. The first demodulator die has a satellite port coupled to the first satellite input port of the MCM substrate, a terrestrial/cable port coupled to the first terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate. The second demodulator die has a satellite port coupled to the second satellite input port of the MCM substrate, a terrestrial/cable port coupled to the second terrestrial/cable input port of the MCM substrate, and first and second transport stream ports coupled to the first and second transport stream ports of the MCM substrate.

Abstract: Die-to-die communication links for receiver integrated circuit dies within multi-die systems and related methods are disclosed for radio frequency (RF) receivers. The disclosed embodiments provide die-to-die communication links that allow for direct communication of operating parameters between receiver integrated circuit dies and other integrated circuit dies within a multi-die system so that the operation of receive path circuitry can be adjusted without requiring intervention from an external host processor integrated circuit. A variety of operating parameter information can be communicated through the die-to-die communication links so that the integrated circuit dies can quickly adjust to changing signal conditions without requiring intervention by the external host processor integrated circuit.

Abstract: Systems and methods are disclosed for MCM (multiple chip module) packages having multiple stacked demodulator dies that share one or more MCM pins. The shared pins can include clock generation pins, clock input/output pins, receive signal path input pins, voltage supply pins, ground supply pins, and/or any other desired pins. In addition to reducing footprint sizes for printed circuit board (PCB) applications, the multi-demodulator MCM package embodiments described herein also allow for improved routing of connection traces on PCBs.

Abstract: A ring detect circuit is shown that includes a regenerative latch configured to be coupled to a telephone line. The regenerative latch is configured to generate a fast transient signal in response to a ring signal on the telephone line. The latch is coupled to an isolation transformer through a capacitor. The fast transient passes across the capacitor and through the transformer. A comparator detects the fast transient and, responsive thereto, generates a ring detect signal.

Abstract: Disclosed is a switch driver circuit is shown where the circuit can control current driven devices and drive devices across a capacitive barrier. A mode control signal determines whether the circuit is in a current mode or a capacitive mode. In current mode, the circuit provides a current output signal at an output of the circuit in response to a subject signal, such as an ON switch control signal for a hook switch application. In capacitive mode, the circuit provides a clocked output signal at the output of the circuit in response to the subject signal, such that the clocked output signal can pass across a capacitive isolation barrier.

Abstract: A shared voltage reference circuit for a codec is shown that includes a voltage reference circuit for producing a reference voltage. A first sample and hold circuit has a first capacitor coupled to an output of the voltage reference circuit through a first switch controlled by a first phase of a sample clock signal for the codec. A second sample and hold circuit has a second capacitor coupled to the output of the voltage reference circuit through a second switch controlled by a second phase of the sample clock signal. A clock generator circuit generates the first and second phases of the sample clock signal, where the first and second phases are non-overlapping.

Abstract: A ring detect circuit is shown that includes a regenerative latch configured to be coupled to a telephone line. The regenerative latch is configured to generate a fast transient signal in response to a ring signal on the telephone line. The latch is coupled to an isolation transformer through a capacitor. The fast transient passes across the capacitor and through the transformer. A comparator detects the fast transient and, responsive thereto, generates a ring detect signal.

Abstract: Disclosed is a switch driver circuit is shown where the circuit can control current driven devices and drive devices across a capacitive barrier. A mode control signal determines whether the circuit is in a current mode or a capacitive mode. In current mode, the circuit provides a current output signal at an output of the circuit in response to a subject signal, such as an ON switch control signal for a hook switch application. In capacitive mode, the circuit provides a clocked output signal at the output of the circuit in response to the subject signal, such that the clocked output signal can pass across a capacitive isolation barrier.

Abstract: A shared voltage reference circuit for a codec is shown that includes a voltage reference circuit for producing a reference voltage. A first sample and hold circuit has a first capacitor coupled to an output of the voltage reference circuit through a first switch controlled by a first phase of a sample clock signal for the codec. A second sample and hold circuit has a second capacitor coupled to the output of the voltage reference circuit through a second switch controlled by a second phase of the sample clock signal. A clock generator circuit generates the first and second phases of the sample clock signal, where the first and second phases are non-overlapping.