Patents by Inventor Vivek Thakkar

Vivek Thakkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230030961
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Application
    Filed: September 30, 2022
    Publication date: February 2, 2023
    Applicant: Intel Corporation
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalapati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Patent number: 11467982
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 5, 2020
    Date of Patent: October 11, 2022
    Assignee: INTEL CORPORATION
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalapati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Patent number: 11169687
    Abstract: The invention enables mapping inputs to a software application. The invention comprises (i) receiving a keymap that correlates a first set of input events capable of being generated through an input device, with a second set of input events that are recognizable by the software application, (ii) receiving from the input device, a first data signal associated with a first input event within the first set of input events, (iii) identifying based on the received keymap, a second input event within the second set of input events, wherein the second input event is mapped to the first input event by the received keymap, (iv) generating a second data signal, wherein the second data signal is recognizable by the software application as corresponding to the second input event, and (v) implementing a state change in the software application based on the second data signal.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: November 9, 2021
    Assignee: Bluestack Systems, Inc.
    Inventors: Sharad Agrawal, Vivek Thakkar, Abhisht Shukla, Mrinal Datt
  • Publication number: 20200364158
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Application
    Filed: August 5, 2020
    Publication date: November 19, 2020
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalpati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Patent number: 10754794
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: August 25, 2020
    Assignee: Intel Corporation
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalapati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Publication number: 20190391719
    Abstract: The invention enables mapping inputs to a software application. The invention comprises (i) receiving a keymap that correlates a first set of input events capable of being generated through an input device, with a second set of input events that are recognizable by the software application, (ii) receiving from the input device, a first data signal associated with a first input event within the first set of input events, (iii) identifying based on the received keymap, a second input event within the second set of input events, wherein the second input event is mapped to the first input event by the received keymap, (iv) generating a second data signal, wherein the second data signal is recognizable by the software application as corresponding to the second input event, and (v) implementing a state change in the software application based on the second data signal.
    Type: Application
    Filed: June 20, 2019
    Publication date: December 26, 2019
    Inventors: Sharad Agrawal, Vivek Thakkar, Abhisht Shukla, Mrinal Datt
  • Publication number: 20180113817
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Application
    Filed: December 12, 2017
    Publication date: April 26, 2018
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalapati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Patent number: 9842065
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: December 12, 2017
    Assignee: Intel Corporation
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalapati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Publication number: 20170212825
    Abstract: A hardware profiling mechanism implemented by performance monitoring hardware enables page level automatic binary translation. The hardware during runtime identifies a code page in memory containing potentially optimizable instructions. The hardware requests allocation of a new page in memory associated with the code page, where the new page contains a collection of counters and each of the counters corresponds to one of the instructions in the code page. When the hardware detects a branch instruction having a branch target within the code page, it increments one of the counters that has the same position in the new page as the branch target in the code page. The execution of the code page is repeated and the counters are incremented when branch targets fall within the code page. The hardware then provides the counter values in the new page to a binary translator for binary translation.
    Type: Application
    Filed: January 10, 2017
    Publication date: July 27, 2017
    Inventors: Paul Caprioli, Matthew C. Merten, Muawya M. Al-Otoom, Omar M. Shaikh, Abhay S. Kanhere, Suresh Srinivas, Koichi Yamada, Vivek Thakkar, Pawel Osciak
  • Patent number: 9542191
    Abstract: A hardware profiling mechanism implemented by performance monitoring hardware enables page level automatic binary translation. The hardware during runtime identifies a code page in memory containing potentially optimizable instructions. The hardware requests allocation of a new page in memory associated with the code page, where the new page contains a collection of counters and each of the counters corresponds to one of the instructions in the code page. When the hardware detects a branch instruction having a branch target within the code page, it increments one of the counters that has the same position in the new page as the branch target in the code page. The execution of the code page is repeated and the counters are incremented when branch targets fall within the code page. The hardware then provides the counter values in the new page to a binary translator for binary translation.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: January 10, 2017
    Assignee: Intel Corporation
    Inventors: Paul Caprioli, Matthew C. Merten, Muawya M. Al-Otoom, Omar M. Shaikh, Abhay S. Kanhere, Suresh Srinivas, Koichi Yamada, Vivek Thakkar, Pawel Osciak
  • Publication number: 20160364341
    Abstract: A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.
    Type: Application
    Filed: June 15, 2015
    Publication date: December 15, 2016
    Applicant: INTEL CORPORATION
    Inventors: Rajesh P. Banginwar, Sumanth Naropanth, Sunil K. Notalapati Prabhakara, Surendra K. Singh, Arvind Mohan, Ravi L. Sahita, Rahil Malhotra, Aman Bakshi, Vasudevarao Kamma, Jyothi Nayak, Vivek Thakkar, Royston A. Pinto
  • Publication number: 20130311758
    Abstract: A hardware profiling mechanism implemented by performance monitoring hardware enables page level automatic binary translation. The hardware during runtime identifies a code page in memory containing potentially optimizable instructions. The hardware requests allocation of a new page in memory associated with the code page, where the new page contains a collection of counters and each of the counters corresponds to one of the instructions in the code page. When the hardware detects a branch instruction having a branch target within the code page, it increments one of the counters that has the same position in the new page as the branch target in the code page. The execution of the code page is repeated and the counters are incremented when branch targets fall within the code page. The hardware then provides the counter values in the new page to a binary translator for binary translation.
    Type: Application
    Filed: March 30, 2012
    Publication date: November 21, 2013
    Inventors: Paul Caprioli, Matthew C. Merten, Muawya M. Al-Otoom, Omar M. Shaikh, Abhay S. Kanhere, Suresh Srinivas, Koichi Yamada, Vivek Thakkar, Pawel Osciak
  • Publication number: 20060291452
    Abstract: A method and apparatus for providing reliable data communications over an unreliable voice dispatch communications channel is provided. A voice dispatch channel is established between an originating mobile station (102) and a target mobile station (104). The voice communications channel uses a Push-to-view reliability protocol that utilizes real time protocol data packets (500) and real time control protocol control messages (600) to provide the reliable data communications. Data is sent from the originating mobile station to the target mobile station using the RTP data packets. When the target mobile station determines that it is missing data or that the data is corrupted, it sends a negative acknowledge to the originating mobile station using RTCP control messages.
    Type: Application
    Filed: June 14, 2006
    Publication date: December 28, 2006
    Inventors: Prashant Velagaleti, Vernell Chapman, Guy Romano, Vivek Thakkar
  • Publication number: 20060099988
    Abstract: A system includes a first wireless device (102) and a second wireless device (106), each having at least two communication modes—one for voice transmission and reception and one for data transmission and reception, and able to communicate wirelessly with each other. The system also includes a shared object between the two devices. During an ongoing conversation between a user of the first device (102) and a user of the second device (106), an object is exchanged between the devices. The devices, working within available manipulation capabilities, communicate manipulation instructions to one another on the data mode of communication. The instructions are carried out and the object is manipulated, providing a shared interactive quasi-real-time or real-time experience.
    Type: Application
    Filed: November 8, 2004
    Publication date: May 11, 2006
    Applicant: MOTOROLA, INC.
    Inventors: Prashant Velagaleti, Vivek Thakkar