Abstract: A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region in the first semiconductor region. The second semiconductor region has the first conductivity type and having a second dopant concentration greater than the first dopant concentration. The method also comprises forming a conductive contact to the first semiconductor region and forming a conductive contact to the second semiconductor region. The rectifying diode comprises a current path, and the path comprises: (i) the conductive contact to the first semiconductor region; (ii) the first semiconductor region; (iii) the second semiconductor region; and (iv) the conductive contact to the second semiconductor region. The second semiconductor region does not extend to a layer buried relative to the first semiconductor region.

Abstract: An integrated circuit includes a first thin film resistor on a first dielectric layer. A first layer of interconnect conductors on the first dielectric layer includes a first and second interconnect conductors electrically contacting the first thin film resistor. A second dielectric layer is formed on the first dielectric layer. A second thin film resistor is formed on the second dielectric layer. A third dielectric layer is formed on the second dielectric layer. A second layer of interconnect conductors on the third dielectric layer includes a third interconnect conductor extending through an opening in the second and third dielectric layers to contact the first interconnect conductor, a fourth interconnect conductor extending through an opening in the second and third dielectric layers to contact the second interconnect conductor, and two interconnect conductors extending through openings in the third dielectric layer of the second thin film resistor.

Abstract: An integrated circuit structure includes a first dielectric layer disposed on a semiconductor layer, a first thin film resistor disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the first thin film resistor, and a second thin film resistor disposed on the second dielectric layer. A first layer of interconnect conductors is disposed on the second dielectric layer and includes a first interconnect conductor contacting a first contact area of the first thin film resistor, a second interconnect conductor contacting a second contact area of the first thin film resistor, and a third interconnect conductor electrically contacting a first contact area of the second thin film resistor. A third dielectric layer is disposed on the second dielectric layer. A second layer of interconnect conductors is disposed on the third dielectric layer including a fourth interconnect conductor for contacting the second interconnect conductor.

Abstract: A Schottky diode includes an isolation region of a first conductivity type and an anode region of a second conductivity type isolated by the isolation region, the anode region including a lightly doped deep anode region of the second conductivity type and an increased dopant region of the second conductivity type, the increased dopant region including a shallow surface dopant spike region of the second conductivity type at a surface of the anode region. A heavily doped anode contact region of the second conductivity type electrically contacts the anode region, and a metal silicide cathode region is disposed in the surface dopant spike region. The peak dopant surface concentration is high enough to produce a predetermined saturation current density. The dopant concentration in the increased dopant region is sufficiently high to suppress the current gain of a parasitic bipolar transistor enough to adequately suppress operation of the parasitic bipolar transistor.

Abstract: A rectifying diode. The diode comprises a first conductor region and a second conductor region. The diode further comprises a diode conductive path between the first conductor region and the second conductor region. The path comprises a first semiconductor volume having a non-uniform distribution of ions and a second semiconductor volume having a uniform distribution of ions relative to the first semiconductor volume.

Abstract: A method of forming a rectifying diode. The method comprises providing a first semiconductor region of a first conductivity type and having a first dopant concentration and forming a second semiconductor region in the first semiconductor region. The second semiconductor region has the first conductivity type and having a second dopant concentration greater than the first dopant concentration. The method also comprises forming a conductive contact to the first semiconductor region and forming a conductive contact to the second semiconductor region. The rectifying diode comprises a current path, and the path comprises: (i) the conductive contact to the first semiconductor region; (ii) the first semiconductor region; (iii) the second semiconductor region; and (iv) the conductive contact to the second semiconductor region. The second semiconductor region does not extend to a layer buried relative to the first semiconductor region.

Abstract: An unguarded Schottky barrier diode structure, which may be part of an integrated device, is provided that blocks the formation of a parasitic MIS diode at the diode's perimeter. The diode is formed in a semiconductive material which may comprise silicon. The portion of the semiconductive material at which the diode is formed may be called a diode portion of the semiconductive material. A highly conductive buried layer is provided under the diode portion of the semiconductive material. The highly conductive buried layer may comprise TiW, Ti, or TiN. The highly conductive buried layer extends laterally to a conductive plug extending to an upper conductive layer of the integrated or other device. A laterally extended silicide region is provided, which extends laterally to a perimeter. The silicide region comprises a lower semiconductor contact area on top of and in contact with the semiconductive material. The lower semiconductor contact area extends laterally to the perimeter.