Patents by Inventor Vladimir Koifman

Vladimir Koifman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170118430
    Abstract: A device comprising a pixel and a readout circuit, wherein the pixel is coupled to the readout circuit; wherein the readout circuit comprises a current control circuit and a comparator; wherein the current control circuit is configured to (a) charge the current control circuit to a pixel affected charge using at least a pixel affected current that is indicative of an electrical parameter of the pixel and (b) drain, based on the pixel affected charge, a current control circuit current during a comparison period; wherein the comparator is configured to compare, during the comparison period, between a pixel affected voltage and a reference signal that changes during the comparison period and to provide at least one pulse that has is indicative of a value of the pixel affected voltage.
    Type: Application
    Filed: October 31, 2016
    Publication date: April 27, 2017
    Inventors: Vladimir Koifman, Tiberiu Galambos, Anatoli Mordakhay
  • Publication number: 20170118426
    Abstract: A device that may include a pixel and a readout circuit, wherein the pixel is coupled to the readout circuit via coupling lines that comprises an output line and a reset line; wherein the readout circuit comprises (a) a comparator that is configured to track a coupling line electrical parameter to generate a pulse that is responsive to value of the electrical parameter, and (b) a pulse width to digital converter for outputting a digital output signal that is responsive to a width of the pulse.
    Type: Application
    Filed: October 27, 2015
    Publication date: April 27, 2017
    Inventors: Vladimir Koifman, Tiberiu Galambos
  • Patent number: 9571774
    Abstract: A device comprising a pixel, a current source, and a readout circuit; wherein during a first readout phase of the pixel, the readout circuit is configured to sample a sampled output voltage of an output node of the pixel; and wherein an output current of the pixel is set by the current source; wherein between the first readout phase of the pixel and a second readout phase of the pixel, the pixel is configured to change the output current to provide a second output current, wherein the change of the output current is responsive to radiation sensed by a radiation sensor of the pixel during a sensing period; wherein during the second readout phase of the pixel the readout circuit is configured to sample the second output current while providing the sampled output voltage to the output node of the pixel; wherein during the first readout phase of the pixel and the second readout phase of the pixel a drain source voltage of an output transistor of the pixel is maintained constant; and wherein the output transistor
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: February 14, 2017
    Assignee: ANALOG VALUE LTD.
    Inventors: Vladimir Koifman, Tiberiu Galambos
  • Publication number: 20160240572
    Abstract: A device comprising a pixel, a current source, and a readout circuit; wherein during a first readout phase of the pixel, the readout circuit is configured to sample a sampled output voltage of an output node of the pixel; and wherein an output current of the pixel is set by the current source; wherein between the first readout phase of the pixel and a second readout phase of the pixel, the pixel is configured to change the output current to provide a second output current, wherein the change of the output current is responsive to radiation sensed by a radiation sensor of the pixel during a sensing period; wherein during the second readout phase of the pixel the readout circuit is configured to sample the second output current while providing the sampled output voltage to the output node of the pixel; wherein during the first readout phase of the pixel and the second readout phase of the pixel a drain source voltage of an output transistor of the pixel is maintained constant; and wherein the output transistor
    Type: Application
    Filed: September 10, 2015
    Publication date: August 18, 2016
    Inventors: Vladimir Koifman, Tiberiu Galambos
  • Publication number: 20160225807
    Abstract: A device that may include a pixel, an output conductor and a charge accelerator; wherein during a readout phase of the pixel, the pixel is configured to attempt to charge the output conductor to a pixel reset voltage and the charge accelerator is configured to perform a sampling operation and a charge operation; wherein during the sampling operation the charge accelerator is configured to sample a change in an output conductor voltage; wherein during the charge operation the charge accelerator is configured to output a charge accelerator output signal that is responsive to the change of the output conductor voltage, wherein once provided, the charge accelerator output signal accelerates a charging of the output conductor to a target voltage that is proximate to the pixel reset voltage; wherein the sampling operation and the charge operation do not overlap.
    Type: Application
    Filed: September 10, 2015
    Publication date: August 4, 2016
    Inventors: Vladimir Koifman, Tiberiu Galambos
  • Patent number: 8629928
    Abstract: A storage system, a non-transitory computer readable medium and a method for pre-fetching. The method may include presenting, by a storage system and to at least one host computer, a logical address space; determining, by a fetch module, to fetch a certain data portion from a data storage device to a cache memory of the storage system; determining, by a pre-fetch module, whether to pre-fetch at least one additional data portion from at least one data storage device to the cache memory based upon at least one characteristic of a mapping tree that maps one or more contiguous ranges of addresses related to the logical address space and one or more contiguous ranges of addresses related to the physical address space; and pre-fetching the at least one additional data portions if it is determined to pre-fetch the at least one additional data portions.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: January 14, 2014
    Assignee: Pixim Israel Ltd.
    Inventor: Vladimir Koifman
  • Publication number: 20140002701
    Abstract: A storage system, a non-transitory computer readable medium and a method for pre-fetching. The method may include presenting, by a storage system and to at least one host computer, a logical address space; determining, by a fetch module, to fetch a certain data portion from a data storage device to a cache memory of the storage system; determining, by a pre-fetch module, whether to pre-fetch at least one additional data portion from at least one data storage device to the cache memory based upon at least one characteristic of a mapping tree that maps one or more contiguous ranges of addresses related to the logical address space and one or more contiguous ranges of addresses related to the physical address space; and pre-fetching the at least one additional data portions if it is determined to pre-fetch the at least one additional data portions.
    Type: Application
    Filed: June 28, 2012
    Publication date: January 2, 2014
    Inventor: Vladimir KOIFMAN
  • Patent number: 8203637
    Abstract: A method for writing to a pixel, the method includes: activating an input transistor and a second transistor; wherein the second transistor is coupled to a second node and the input transistor is coupled between the second node and a photo-detector; inactivating the second transistor; compensating for second node voltage change resulting from the inactivating of the second transistor by providing a feedback signal to a pixel node that is capacitively coupled to the second node via at least one pixel capacitance; repeating, until a control criterion is fulfilled, the stages of: inactivating the input transistor, and measuring a pixel output signal; and operating the input transistor in a weakly conductive mode and providing to the pixel a feedback signal that is responsive to a result of the measurement of the pixel output signal.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: June 19, 2012
    Assignee: PIXIM Israel Ltd.
    Inventor: Vladimir Koifman
  • Patent number: 8184173
    Abstract: A method for reading a pixel, the method includes: (i) generating a first signal responsive to light sensed by the pixel during a first exposure period; (ii) comparing a first threshold to a first value of the first signal; (iii) writing a second value to the pixel; wherein the second value equals the first threshold if the first value exceeds the first threshold; wherein the second value equals the first value is the first signal is below the first threshold; (iv) generating a third signal responsive to the second value and to light sensed by the pixel during a second exposure period; (v) reading the third signal; and (vi) calculating a digital detection signal in response to a value of the third signal and in response to a first threshold.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: May 22, 2012
    Assignee: Pixim Israel Ltd.
    Inventors: Vladimir Koifman, Dmitry Pudnik, Itai Mar-Or, Chen Bankirer
  • Publication number: 20110216232
    Abstract: A method for writing to a pixel, the method includes: activating an input transistor and a second transistor; wherein the second transistor is coupled to a second node and the input transistor is coupled between the second node and a photo-detector; inactivating the second transistor; compensating for second node voltage change resulting from the inactivating of the second transistor by providing a feedback signal to a pixel node that is capacitively coupled to the second node via at least one pixel capacitance; repeating, until a control criterion is fulfilled, the stages of: inactivating the input transistor, and measuring a pixel output signal; and operating the input transistor in a weakly conductive mode and providing to the pixel a feedback signal that is responsive to a result of the measurement of the pixel output signal.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 8, 2011
    Inventor: Vladimir KOIFMAN
  • Patent number: 7969476
    Abstract: A method for accessing a pixel, the method includes: providing a fixed reference current to a readout circuit that is coupled to a pixel, wherein the fixed reference current is indifferent to changes in a pixel output current drained by the pixel; wherein a value of the pixel output current is responsive to light impinging on the pixel during an integration period; and sampling a difference signal that is responsive to a different between the fixed reference current and the pixel output current while providing the fixed reference current to the readout circuit.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: June 28, 2011
    Inventor: Vladimir Koifman
  • Patent number: 7936388
    Abstract: The invention provides a method and apparatus. The apparatus includes a pixels (10) adapted to receive light and to output a current representative of the received light; a feedback circuitry (20), connected to the pixel (10), adapted to receive said current and to receive a reference current (Iref) and to provide a feedback signal to the pixel (10) at least during at least a reset stage of the pixel (10). The method includes: (i) receiving light, by a pixel 10), and providing a pixel output signal representative of the received light; (ii) receiving, by a feedback circuitry, the pixel output signal; and (iii) providing multiple feedback signals to the pixel at least during a reset stage of the pixel (10).
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: May 3, 2011
    Assignee: Advasense Technologies (2004) Ltd.
    Inventors: Vladimir Koifman, Natan Baron
  • Patent number: 7852143
    Abstract: A system that includes: multiple transistors that comprise a first transistor that is maintained in a weak inversion state; wherein sources of the multiple transistors are coupled to a low current source; wherein drains of the multiple transistors are coupled to a voltage supply source; a first amplifier that has a positive input, negative input and an output; wherein the positive input receives an input voltage; wherein the negative input is coupled to a source of the first transistor; wherein the output is coupled to a gate of the first transistor and to a multiplication and subtracting circuit; a multiplication and subtraction circuit that is coupled to the first amplifier and outputs an output signal that equals a difference between the input voltage and a product of a current reduction variable and a voltage reduction signal; wherein the voltage reduction signal is associated with a current reduction factor; wherein the output signal is provided to a second transistor that is maintained in weak inversion
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: December 14, 2010
    Assignee: Advasense Technologies Ltd.
    Inventors: Vladimir Koifman, Noam Eshel, Zeituni Golan
  • Patent number: 7791664
    Abstract: Methods for reading a pixel and writing to a pixel and devices having pixel reading capabilities and pixel writing capabilities. A method for reading a pixel includes: activating a second transistor that is coupled to a second node while maintaining an input transistor inactive; wherein the first transistor is coupled between the second node and a photo-detector; inactivating the second transistor; compensating for second node voltage change resulting from the inactivating of the second transistor by providing a feedback signal via at least one capacitance that capacitively couples the pixel node to the second node; and activating the input transistor and measuring a pixel output signal.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: September 7, 2010
    Inventor: Vladimir Koifman
  • Publication number: 20100188132
    Abstract: A system that includes: multiple transistors that comprise a first transistor that is maintained in a weak inversion state; wherein sources of the multiple transistors are coupled to a low current source; wherein drains of the multiple transistors are coupled to a voltage supply source; a first amplifier that has a positive input, negative input and an output; wherein the positive input receives an input voltage; wherein the negative input is coupled to a source of the first transistor; wherein the output is coupled to a gate of the first transistor and to a multiplication and subtracting circuit; a multiplication and subtraction circuit that is coupled to the first amplifier and outputs an output signal that equals a difference between the input voltage and a product of a current reduction variable and a voltage reduction signal; wherein the voltage reduction signal is associated with a current reduction factor; wherein the output signal is provided to a second transistor that is maintained in weak inversion
    Type: Application
    Filed: January 29, 2009
    Publication date: July 29, 2010
    Inventors: Vladimir Koifman, Noam Eshel, Zeituni Golan
  • Patent number: 7612586
    Abstract: A low noise analog sampling circuit that includes a transistor connected to a first feedback loop and to a second feedback loop. During a second operational phase the second feedback loop provides the transistor a feedback signal that is responsive to an amplified error signal; wherein the error signal represents a difference between (i) a sampled signal representative of a state of the transistor short period before a first feedback loop was opened and (ii) a signal representative of a current state of the transistor; wherein at an end of the second operational phase the second feedback loop is opened and introduces a second noise that is attenuated by multiple capacitors.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: November 3, 2009
    Assignee: Advasense Technologies (2004) Ltd.
    Inventor: Vladimir Koifman
  • Patent number: 7477175
    Abstract: A device that includes: (i) an input node, adapted to receive an analog input current; (ii) an integrating capacitor; wherein a first end of the integrating capacitor is connected to the input node; (iii) a quantizer that comprises a data input, a clock input and an output; wherein the data input is connected to the input node, the clock input receives a jittered clock signal and the output controls a first switch in response to a voltage level of the input node; (iv) a fast charge transfer circuit, for transferring to the integrating capacitor a fixed charge if a first switch is closed; wherein the fixed charge is being transferred during a charge transfer period that is substantially shorter than a minimal clock signal phase of the jittered clock signal; and (v) a first switch, connected between the input node and the fast charge transfer circuit.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: January 13, 2009
    Assignee: Advasense Technologies (2004) Ltd
    Inventors: Vadim Tkachev, Vladimir Koifman
  • Publication number: 20070188639
    Abstract: The invention provides a method and apparatus. The apparatus includes a pixel (10) adapted to receive light and to output a current representative of the received light; a feedback circuitry (20), connected to the pixel (10), adapted to receive said current and to receive a reference current (Iref) and to provide a feedback signal to the pixel (10) at least during at least a reset stage of the pixel (10). The method includes: (i) receiving light, by a pixel 10), and providing a pixel output signal representative of the received light; (ii) receiving, by a feedback circuitry, the pixel output signal; and (iii) providing multiple feedback signals to the pixel at least during a reset stage of the pixel (10).
    Type: Application
    Filed: December 11, 2003
    Publication date: August 16, 2007
    Inventors: Vladimir Koifman, Natan Baron
  • Patent number: 6683926
    Abstract: In a radio circuit (299) that forwards a signal pair (I,Q) by first (291, I) and second (292, Q) channels, by converting the signal pair (I,Q) from a digital form (ID, QD) to an analog form (IA, QA), a gain controller (200) monitors differences between the overall gains (GI, GQ) in the channels and corrects a gain imbalance by feeding back a gain determining control signal (W) to one of the channels. The gain controller (200) has digital comparators (221-224) at the inputs (281, 282) of the channels and analog comparators at the outputs (283, 284) of the channels. Intrinsic offsets of the analog comparators are determined and compensated by subtracting corresponding offsets from the digital comparators.
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: January 27, 2004
    Assignee: Motorola, Inc.
    Inventors: Michael Zarubinsky, Ronen Paz, Vladimir Koifman
  • Patent number: 6671336
    Abstract: In a radio circuit (299) that forwards a signal pair (I,Q) by a first channel (291, I) and by a second channel (292, Q), a gain controller (200) monitors differences between the overall gains (GI, GQ) in the channels and corrects a gain imbalance by feeding back a gain determining control signal (W) to one of the channels. The controller has first (221-224) and second (211-214) pluralities of single-bit comparators, operating at a high sampling rate, to monitor the signal pair at the channel inputs (281, 282) and at the channel outputs (283, 284), respectively, and to provide difference signals (&Dgr;X,&Dgr;Y) to an integrator (280) that calculates the gain control signal (W) at a decimated sampling rate (FR).
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: December 30, 2003
    Assignee: Motorola, Inc.
    Inventors: Michael Zarubinsky, Ronen Paz, Vladimir Koifman