Patents by Inventor Vladimir Stojanovic

Vladimir Stojanovic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210257021
    Abstract: A computer memory system includes an electro-optical chip, an electrical fanout chip electrically connected to an electrical interface of the electro-optical chip, and at least one dual in-line memory module (DIMM) slot electrically connected to the electrical fanout chip. A photonic interface of the electro-optical chip is optically connected to an optical link. The electro-optical chip includes at least one optical macro that converts outgoing electrical data signals into outgoing optical data signals for transmission through the optical link. The optical macro also converts incoming optical data signals from the optical link into incoming electrical data signals and transmits the incoming electrical data signals to the electrical fanout chip. The electrical fanout chip directs bi-directional electrical data communication between the electro-optical chip and a dynamic random access memory (DRAM) DIMM corresponding to the at least one DIMM slot.
    Type: Application
    Filed: February 14, 2021
    Publication date: August 19, 2021
    Inventors: Roy Edward Meade, Vladimir Stojanovic, Chen Sun, Mark Wade, Hugo Saleh, Charles Wuischpard
  • Publication number: 20210135025
    Abstract: Method and structural embodiments are described which provide an integrated structure using polysilicon material having different optical properties in different regions of the structure.
    Type: Application
    Filed: January 9, 2021
    Publication date: May 6, 2021
    Inventors: Roy Meade, Karan Mehta, Efraim Megged, Jason Orcutt, Milos Popovic, Rajeev Ram, Jeffrey Shainline, Zvi Sternberg, Vladimir Stojanovic, Ofer Tehar-Zahav
  • Publication number: 20210126722
    Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.
    Type: Application
    Filed: November 24, 2020
    Publication date: April 29, 2021
    Inventors: Andrew Ho, Vladimir Stojanovic, Bruno W. Garlepp, Fred F. Chen
  • Patent number: 10903377
    Abstract: Method and structural embodiments are described which provide an integrated structure using polysilicon material having different optical properties in different regions of the structure.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: January 26, 2021
    Assignees: Micron Technology, Inc., Massachusetts Institute of Technology
    Inventors: Roy Meade, Karan Mehta, Efraim Megged, Jason Orcutt, Milos Popovic, Rajeev Ram, Jeffrey Shainline, Zvi Sternberg, Vladimir Stojanovic, Ofer Tehar-Zahav
  • Publication number: 20210006341
    Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.
    Type: Application
    Filed: July 16, 2020
    Publication date: January 7, 2021
    Inventors: Andrew Ho, Vladimir Stojanovic, Bruno W. Garlepp, Fred F. Chen
  • Publication number: 20200409004
    Abstract: A plurality of lid structures include at least one lid structure configured to overlie one or more heat sources within a multi-chip-module and at least one lid structure configured to overlie one or more temperature sensitive components within the multi-chip-module. The plurality of lid structures are configured and positioned such that each lid structure is separated from each adjacent lid structure by a corresponding thermal break. A heat spreader assembly is positioned in thermally conductive interface with the plurality of lid structures. The heat spreader assembly is configured to cover an aggregation of the plurality of lid structures. The heat spreader assembly includes a plurality of separately defined heat transfer members respectively configured and positioned to overlie the plurality of lid structures. The heat spreader assembly is configured to limit heat transfer between different heat transfer members within the heat spreader assembly.
    Type: Application
    Filed: September 15, 2020
    Publication date: December 31, 2020
    Inventors: Roy Edward Meade, Vladimir Stojanovic
  • Patent number: 10880022
    Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: December 29, 2020
    Assignee: Rambus Inc.
    Inventors: Andrew Ho, Vladimir Stojanovic, Bruno W. Garlepp, Fred F. Chen
  • Publication number: 20200403703
    Abstract: A laser module includes a laser source and an optical marshalling module. The laser source is configured to generate and output a plurality of laser beams. The plurality of laser beams have different wavelengths relative to each other. The different wavelengths are distinguishable to an optical data communication system. The optical marshalling module is configured to receive the plurality of laser beams from the laser source and distribute a portion of each of the plurality of laser beams to each of a plurality of optical output ports of the optical marshalling module, such that all of the different wavelengths of the plurality of laser beams are provided to each of the plurality of optical output ports of the optical marshalling module. An optical amplifying module can be included to amplify laser light output from the optical marshalling module and provide the amplified laser light as output from the laser module.
    Type: Application
    Filed: September 8, 2020
    Publication date: December 24, 2020
    Inventors: Chen Sun, Roy Edward Meade, Mark Wade, Alexandra Wright, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Derek Van Orden
  • Publication number: 20200382215
    Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 3, 2020
    Inventors: Chen Sun, Roy Edward Meade, Mark Wade, Alexandra Wright, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Derek Van Orden, Michael Davenport
  • Patent number: 10845555
    Abstract: An optical module includes a laser light supply system and a chip disposed within a housing. The chip includes a laser input optical port and a transmit data optical port and a receive data optical port. The optical module includes a link-fiber interface exposed at an exterior surface of the housing. The link-fiber interface includes a transmit data connector and a receive data connector. The optical module includes a polarization-maintaining optical fiber connected between a laser output optical port of the laser light supply system and the laser input optical port of the chip. The optical module includes a first non-polarization-maintaining optical fiber connected between the transmit data optical port of the chip and the transmit data connector of the link-fiber interface. The optical module includes a second non-polarization-maintaining optical fiber connected between the receive data optical port of the chip and the receive data connector of the link-fiber interface.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: November 24, 2020
    Assignee: Ayar Labs, Inc.
    Inventors: John Fini, Roy Edward Meade, Mark Wade, Chen Sun, Vladimir Stojanovic, Alexandra Wright
  • Publication number: 20200355880
    Abstract: An optical input/output chiplet is disposed on a first package substrate. The optical input/output chiplet includes one or more supply optical ports for receiving continuous wave light. The optical input/output chiplet includes one or more transmit optical ports through which modulated light is transmitted. The optical input/output chiplet includes one or more receive optical ports through which modulated light is received by the optical input/output chiplet. An optical power supply module is disposed on a second package substrate. The second package substrate is separate from the first package substrate. The optical power supply module includes one or more output optical ports through which continuous wave laser light is transmitted. A set of optical fibers optically connect the one or more output optical ports of the optical power supply module to the one or more supply optical ports of the optical input/output chiplet.
    Type: Application
    Filed: July 23, 2020
    Publication date: November 12, 2020
    Inventors: Alexandra Wright, Mark Wade, Chen Sun, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Roy Edward Meade, Derek Van Orden
  • Patent number: 10775576
    Abstract: A plurality of lid structures include at least one lid structure configured to overlie one or more heat sources within a multi-chip-module and at least one lid structure configured to overlie one or more temperature sensitive components within the multi-chip-module. The plurality of lid structures are configured and positioned such that each lid structure is separated from each adjacent lid structure by a corresponding thermal break. A heat spreader assembly is positioned in thermally conductive interface with the plurality of lid structures. The heat spreader assembly is configured to cover an aggregation of the plurality of lid structures. The heat spreader assembly includes a plurality of separately defined heat transfer members respectively configured and positioned to overlie the plurality of lid structures. The heat spreader assembly is configured to limit heat transfer between different heat transfer members within the heat spreader assembly.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: September 15, 2020
    Assignee: Ayar Labs, Inc.
    Inventors: Roy Edward Meade, Vladimir Stojanovic
  • Patent number: 10771160
    Abstract: A laser module includes a laser source and an optical marshalling module. The laser source is configured to generate and output a plurality of laser beams. The plurality of laser beams have different wavelengths relative to each other. The different wavelengths are distinguishable to an optical data communication system. The optical marshalling module is configured to receive the plurality of laser beams from the laser source and distribute a portion of each of the plurality of laser beams to each of a plurality of optical output ports of the optical marshalling module, such that all of the different wavelengths of the plurality of laser beams are provided to each of the plurality of optical output ports of the optical marshalling module. An optical amplifying module can be included to amplify laser light output from the optical marshalling module and provide the amplified laser light as output from the laser module.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: September 8, 2020
    Assignee: Ayar Labs, Inc.
    Inventors: Chen Sun, Roy Edward Meade, Mark Wade, Alexandra Wright, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Derek Van Orden
  • Publication number: 20200264390
    Abstract: A photonic chip includes a substrate, an electrical isolation region formed over the substrate, and a front end of line (FEOL) region formed over the electrical isolation region. The photonic chip also includes an optical coupling region. The electrical isolation region and the FEOL region and a portion of the substrate are removed within the optical coupling region. A top surface of a the substrate within the optical coupling region includes a plurality of grooves configured to receive and align a plurality of optical fibers. The grooves are formed at a vertical depth within the substrate to provide for alignment of optical cores of the plurality of optical fibers with the FEOL region when the plurality of optical fibers are positioned within the plurality of grooves within the optical coupling region.
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Inventors: Mark Wade, Chen Sun, John Fini, Roy Edward Meade, Vladimir Stojanovic, Alexandra Wright
  • Patent number: 10749603
    Abstract: An interposer device includes a substrate that includes a laser source chip interface region, a silicon photonics chip interface region, an optical amplifier module interface region. A fiber-to-interposer connection region is formed within the substrate. A first group of optical conveyance structures is formed within the substrate to optically connect a laser source chip to a silicon photonics chip when the laser source chip and the silicon photonics chip are interfaced to the substrate. A second group of optical conveyance structures is formed within the substrate to optically connect the silicon photonics chip to an optical amplifier module when the silicon photonics chip and the optical amplifier module are interfaced to the substrate. A third group of optical conveyance structures is formed within the substrate to optically connect the optical amplifier module to the fiber-to-interposer connection region when the optical amplifier module is interfaced to the substrate.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: August 18, 2020
    Assignee: Ayar Labs, Inc.
    Inventors: Chen Sun, Roy Edward Meade, Mark Wade, Alexandra Wright, Vladimir Stojanovic, Rajeev Ram, Milos Popovic, Derek Van Orden, Michael Davenport
  • Patent number: 10735116
    Abstract: Described are methods and circuits for margin testing digital receivers. These methods and circuits prevent margins from collapsing in response to erroneously received data and can thus be used in receivers that employ historical data to reduce intersymbol interference (ISI). Some embodiments detect receive errors for input data streams of unknown patterns and can thus be used for in-system margin testing. Such systems can be adapted to dynamically alter system parameters during device operation to maintain adequate margins despite fluctuations in the system noise environment due to e.g. temperature and supply-voltage changes. Also described are methods of plotting and interpreting filtered and unfiltered error data generated by the disclosed methods and circuits. Some embodiments filter error data to facilitate pattern-specific margin testing.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: August 4, 2020
    Assignee: Rambus Inc.
    Inventors: Andrew Ho, Vladimir Stojanovic, Bruno W. Garlepp, Fred F. Chen
  • Publication number: 20200169056
    Abstract: A laser light generator is configured to generate one or more wavelengths of continuous wave laser light. The laser light generator is configured to collectively and simultaneously transmit each of the wavelengths of continuous wave laser light through an optical output of the laser light generator as a laser light supply. An optical fiber is connected to receive the laser light supply from the optical output of the laser light generator. An optical distribution network has an optical input connected to receive the laser light supply from the optical fiber. The optical distribution network is configured to transmit the laser light supply to each of one or more optical transceivers and/or optical sensors. The laser light generator is physically separate from each of the one or more optical transceivers and/or optical sensors.
    Type: Application
    Filed: January 30, 2020
    Publication date: May 28, 2020
    Inventors: Milos Popovic, Rajeev Ram, Vladimir Stojanovic, Chen Sun, Mark Taylor Wade, Alexandra Carroll Wright
  • Publication number: 20200158950
    Abstract: A photonic fanout die has a planar structure that has a top surface, a bottom surface, and outer side surfaces extending between the top surface and the bottom surface around an outer perimeter of the planar structure. The planar structure includes an opening formed within the outer perimeter. The opening has side surfaces that extend from the top surface to the bottom surface. The photonic fanout die also includes a plurality of optical waveguides formed within the planar structure to extend from a side surface of the opening to an outer side surface of the planar structure. The plurality of optical waveguides is configured such that a spacing between adjacent optical waveguides at the outer side surface of the planar structure is greater than a spacing between adjacent optical waveguides at the side surface of the opening.
    Type: Application
    Filed: November 19, 2019
    Publication date: May 21, 2020
    Inventors: Roy Edward Meade, Vladimir Stojanovic, Mark Wade
  • Patent number: 10641976
    Abstract: A photonic chip includes a substrate, an electrical isolation region formed over the substrate, and a front end of line (FEOL) region formed over the electrical isolation region. The photonic chip also includes an optical coupling region. The electrical isolation region and the FEOL region and a portion of the substrate are removed within the optical coupling region. A top surface of a the substrate within the optical coupling region includes a plurality of grooves configured to receive and align a plurality of optical fibers. The grooves are formed at a vertical depth within the substrate to provide for alignment of optical cores of the plurality of optical fibers with the FEOL region when the plurality of optical fibers are positioned within the plurality of grooves within the optical coupling region.
    Type: Grant
    Filed: February 22, 2018
    Date of Patent: May 5, 2020
    Assignee: Ayar Labs, Inc.
    Inventors: Mark Wade, Chen Sun, John Fini, Roy Edward Meade, Vladimir Stojanovic, Alexandra Wright
  • Patent number: 10581215
    Abstract: A laser light generator is configured to generate one or more wavelengths of continuous wave laser light. The laser light generator is configured to collectively and simultaneously transmit each of the wavelengths of continuous wave laser light through an optical output of the laser light generator as a laser light supply. An optical fiber is connected to receive the laser light supply from the optical output of the laser light generator. An optical distribution network has an optical input connected to receive the laser light supply from the optical fiber. The optical distribution network is configured to transmit the laser light supply to each of one or more optical transceivers and/or optical sensors. The laser light generator is physically separate from each of the one or more optical transceivers and/or optical sensors.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: March 3, 2020
    Assignee: Ayar Labs, Inc.
    Inventors: Milos Popovic, Rajeev Ram, Vladimir Stojanovic, Chen Sun, Mark Taylor Wade, Alexandra Carroll Wright