Abstract: In one aspect of the invention is a method for reducing crosstalk and maintaining clearances between traces on a printed circuit board design. Crosstalk caused by placing traces a virtual printed circuit board are reduced by placing artificial obstructs, called spacers, between traces and/or between traces and nets to create a user-specified clearance between the traces and/or nets. As additional traces and/or nets are added to the virtual printed circuit board, the spacers are dynamic and adjust accordingly to maintain the specified clearances.

Abstract: A server computer maintains a master database for a PCB design, and a copy of the PCB design is provided to multiple client computers. The server assigns each client a different pair of pins for which a connection must be routed. When a client completes an assigned routing task, it requests that the server update the PCB master design with the route found by the client for its assigned pin pair. After forwarding the request, the client does not update its copy of the PCB design to reflect the found route. Instead, the client returns its copy to the state occupied prior to assignment of the pin pair by the server. Upon receiving notification that the server incorporated the found route, the client updates its copy of the design to include that route.

Abstract: Methods and apparatuses for marking the product of an unauthorized use of a process are provided. For example, various implementations of the invention may cause a product to be marked when it is produced by the unauthorized use of a process. With some implementations of the invention, a computer program product may contain operations, which if the computer program product is used without authorization, would cause an inconspicuous mark to be placed within the output of the computer program or computer program product.

Abstract: Various implementations of the invention provide a method for dynamically determining a layer bias. In various implementations, the layer bias may be employed to determine placement locations for a trace within an electrical device layout design. The trace providing for the electrical connection of components or pins within the layout design. With various implementations of the invention, a layer within the layout design is partitioned into regions, selected regions having a bias. As events or alterations to the layout design occur, the corresponding bias for the selected regions is updated to reflect any changes in bias occurring due to the event or alteration. With other implementations of the invention, processes, machines, or manufactures are provided that dynamically determine a layer bias. The dynamically determined layer bias may be incorporated into a layer bias heuristic employed by for example, an automated trace routing tool.

Abstract: Multiple printed circuit board (PCB) application programs simultaneously execute on a computer. Each application stores data regarding a PCB design in a separate database. The databases are based on compatible data models such that each application is able to receive data from other applications and understand what is to be done with that data. When an edit to a PCB design is made by an application, data for the edit is stored in that application's database. The data for the edit is also automatically provided, via a message server program, to other PCB applications. Each PCB application then stores that edit data in its own database.

Abstract: Multiple users may simultaneously edit a shared area of a printed circuit board design. In order to prevent conflicts between multiple users, a user draws a protection border around a portion of his or her workspace so as to temporarily reserve the protected portion and prevent editing by other users. The protection border may be broadcast to other users. The protection border may also define a protected region in which a user may evaluate alternative design changes without requesting corresponding changes to a master PCB design.

Abstract: In one aspect of the invention is a method for reducing crosstalk and maintaining clearances between traces on a printed circuit board design. Crosstalk caused by placing traces a virtual printed circuit board are reduced by placing artificial obstructs, called spacers, between traces and/or between traces and nets to create a user-specified clearance between the traces and/or nets. As additional traces and/or nets are added to the virtual printed circuit board, the spacers are dynamic and adjust accordingly to maintain the specified clearances.

Abstract: Multiple users simultaneously edit at least a portion of a printed circuit board (PCB) design. The PCB design portion is transmitted to first and second clients for graphical display at each of the clients. A first protection boundary is associated with an area of the PCB design being edited at the first client. A second protection boundary is associated with an area of the PCB design being edited at the second client. The first and second protection boundaries are displayed at each of the first and second clients. A request from one of the clients to edit an object within a region bounded by a protection boundary associated with the other client is rejected. The protection boundary may surround a user's cursor. The size of the boundary may increase based on editing activity by a user in an area of a PCB design.

Abstract: In one aspect of the invention is a method for reducing crosstalk and maintaining clearances between traces on a printed circuit board design. Crosstalk caused by placing traces a virtual printed circuit board are reduced by placing artificial obstructs, called spacers, between traces and/or between traces and nets to create a user-specified clearance between the traces and/or nets. As additional traces and/or nets are added to the virtual printed circuit board, the spacers are dynamic and adjust accordingly to maintain the specified clearances.

Abstract: A server computer maintains a master database for a PCB design, and a copy of the PCB design is provided to multiple client computers. The server assigns each client a different pair of pins for which a connection must be routed. When a client completes an assigned routing task, it requests that the server update the PCB master design with the route found by the client for its assigned pin pair. After forwarding the request, the client does not update its copy of the PCB design to reflect the found route. Instead, the client returns its copy to the state occupied prior to assignment of the pin pair by the server. Upon receiving notification that the server incorporated the found route, the client updates its copy of the design to include that route.

Abstract: Multiple users may simultaneously edit a shared area of a printed circuit board design. In order to prevent conflicts between multiple users, a user draws a protection border around a portion of his or her workspace so as to temporarily reserve the protected portion and prevent editing by other users. The protection border may be broadcast to other users. The protection border may also define a protected region in which a user may evaluate alternative design changes without requesting corresponding changes to a master PCB design.