Patents by Inventor Volker Kilian
Volker Kilian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7398444Abstract: The invention relates to a method for testing a memory device with the memory device being able to be operated in a normal operating mode and a test mode and encompassing an output driver, input driver, and data pads. The method includes the steps of communicating test input data to be used for a test to the memory device, performing a test using the test input data in order to obtain test output data, the test data read out being passed via an output driver, at least one data pad, and an input driver, wherein the input drivers and output drivers are switched during the test in such a way as to enable data to be simultaneously read from and written to the memory device, and creating a data test result from the test output data. Furthermore, the invention relates to a memory device and a system for testing a memory device.Type: GrantFiled: September 6, 2005Date of Patent: July 8, 2008Assignee: Infineon Technologies AGInventors: Martin Brox, Robert Kaiser, Volker Kilian, Wolfgang Spirkl
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Patent number: 7349253Abstract: A memory device and method for testing memory devices with repairable redundancy is disclosed. In one embodiment, both the regular memory area and the redundant memory area are subject to the same loads during manufacturing and test processes, and that at least one regular memory cell from a regular memory area and at least one redundant memory cell from a redundant memory area are connected with each other via a coupling circuit. The coupling circuit, in particular during the testing of the operability of the semiconductor memory device or of the memory cells, respectively, determines the state of the regular memory cell and/or the redundant memory cell. Thus, in tested and repaired semiconductor memory devices, so-called redundancy storage space for the repair of defective memory capacity can be provided for repair even in the last memory test step, including full test severity and fulfilling all and any reliability requirements for the repair of high-grade memory devices.Type: GrantFiled: January 31, 2006Date of Patent: March 25, 2008Assignee: Infineon Technologies AGInventors: Martin Perner, Volker Kilian
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Patent number: 7184339Abstract: The invention relates to a semi-conductor component, and a process for the in- and/or output of test data and/or semi-conductor component operating control data into or from a semi-conductor component, whereby the semi-conductor component comprises one or more useful data memory cells, and/or one or more test data and/or semi-conductor component operating control data registers for storing test data and/or semi-conductor component operating control data, and whereby the process comprises the steps of applying a control signal to the semi-conductor component, whereby the semi-conductor component is switched from a first to a second operating mode; and applying an address signal to the semi-conductor component, whereby one or more of the test data and/or semi-conductor component operating control data registers of the semi-conductor component is addressed by the address signal in the second operating mode, and one or more of the useful data memory cells in the first operating mode.Type: GrantFiled: October 20, 2005Date of Patent: February 27, 2007Assignee: Infineon Technologies AGInventors: Thorsten Bucksch, Martin Perner, Volker Kilian, Martin Meier
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Patent number: 7113015Abstract: A tuning circuit for setting a signal propagation time on a signal line in an integrated circuit, particularly a DRAM circuit, has a transistor and a capacitor. A control connection of the transistor is connected to a control unit for the purpose of switchably connecting the capacitor to the signal line through the transistor in order to set the signal propagation time on the signal line on the basis of application of a control signal, generated in the control unit, to the control connection on the transistor.Type: GrantFiled: November 8, 2002Date of Patent: September 26, 2006Assignee: Infineon Technologies AGInventors: Lenart Hauptner, Volker Kilian, Richard Roth, Stefan Sommer
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Publication number: 20060198215Abstract: A memory device and method for testing memory devices with repairable redundancy is disclosed. In one embodiment, both the regular memory area and the redundant memory area are subject to the same loads during manufacturing and test processes, and that at least one regular memory cell from a regular memory area and at least one redundant memory cell from a redundant memory area are connected with each other via a coupling circuit. The coupling circuit, in particular during the testing of the operability of the semiconductor memory device or of the memory cells, respectively, determines the state of the regular memory cell and/or the redundant memory cell. Thus, in tested and repaired semiconductor memory devices, so-called redundancy storage space for the repair of defective memory capacity can be provided for repair even in the last memory test step, including full test severity and fulfilling all and any reliability requirements for the repair of high-grade memory devices.Type: ApplicationFiled: January 31, 2006Publication date: September 7, 2006Inventors: Martin Perner, Volker Kilian
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Publication number: 20060087900Abstract: The invention relates to a semi-conductor component, and a process for the in- and/or output of test data and/or semi-conductor component operating control data into or from a semi-conductor component, whereby the semi-conductor component comprises one or more useful data memory cells, and/or one or more test data and/or semi-conductor component operating control data registers for storing test data and/or semi-conductor component operating control data, and whereby the process comprises the steps of applying a control signal to the semi-conductor component, whereby the semi-conductor component is switched from a first to a second operating mode; and applying an address signal to the semi-conductor component, whereby one or more of the test data and/or semi-conductor component operating control data registers of the semi-conductor component is addressed by the address signal in the second operating mode, and one or more of the useful data memory cells in the first operating mode.Type: ApplicationFiled: October 20, 2005Publication date: April 27, 2006Applicant: INFINEON TECHNOLOGIES AGInventors: Thorsten Bucksch, Martin Perner, Volker Kilian, Martin Meier
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Publication number: 20060059397Abstract: The invention relates to a method for testing a memory device with the memory device being able to be operated in a normal operating mode and a test mode and comprising output driver, input driver, and data pads. The method comprises the steps of communicating test input data to be used for a test to the memory device, performing a test using the test input data in order to obtain test output data, the test data read out being passed via an output driver, at least one data pad, and an input driver, wherein the input drivers and output drivers are switched during the test in such a way as to enable data to be simultaneously read from and written to the memory device, and creating a data test result from the test output data. Furthermore, the invention relates to a memory device and a system for testing a memory device.Type: ApplicationFiled: September 6, 2005Publication date: March 16, 2006Inventors: Martin Brox, Robert Kaiser, Volker Kilian, Wolfgang Spirkl
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Patent number: 6870392Abstract: To generate test signals by a test logic unit on a semiconductor wafer, the test signals being used to check specific functions and/or parameters of an integrated circuit on the semiconductor wafer, at least two test signals are provided substantially simultaneously by the test logic unit and are subsequently serialized to generate a multiplexed test signal sequence with a data rate required for testing.Type: GrantFiled: February 18, 2003Date of Patent: March 22, 2005Assignee: Infineon Technologies AGInventors: Volker Kilian, Richard Roth
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Patent number: 6867597Abstract: In the case of the present-day trend of miniaturizing housed electronic devices, there is the problem that the contact spacings between the terminal pins becomes smaller and smaller and are no longer visible optically. As a result, it also becomes more difficult to solder the contacts of correspondingly designed contact bases, which for example, are designed as test bases, to the individual conductor tracks of the printed circuit board. Possible faulty soldering points, short circuits or interruptions have hitherto been tracked down by laborious manual measurement using the TDR method. The invention proposes producing a test device in which in each case two terminal pins are connected to a short-circuiting bridge. The test device is inserted into the contact base and connects two signal paths of the printed circuit board on which the propagation time of a reflected wave can be measured.Type: GrantFiled: November 12, 2002Date of Patent: March 15, 2005Assignee: Infineon Technologies AGInventors: Lenart Hauptner, Volker Kilian, Richard Roth, Stefan Sommer
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Publication number: 20030159098Abstract: To generate test signals by a test logic unit on a semiconductor wafer, the test signals being used to check specific functions and/or parameters of an integrated circuit on the semiconductor wafer, at least two test signals are provided substantially simultaneously by the test logic unit and are subsequently serialized to generate a multiplexed test signal sequence with a data rate required for testing.Type: ApplicationFiled: February 18, 2003Publication date: August 21, 2003Inventors: Volker Kilian, Richard Roth
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Patent number: 6600331Abstract: The invention relates to a method for measuring the junction temperature in an electronic component. A periodic test signal is led via a signal path inside the component in order to obtain an internal signal. There is a frequency and/or phase relationship between the periodic test signal and a periodic external signal. A phase shift is measured between the internal signal and the external signal. The junction temperature is determined over the component region determined by the signal path as a function of the phase shift.Type: GrantFiled: May 30, 2002Date of Patent: July 29, 2003Assignee: Infineon Technologies AGInventors: Volker Kilian, Richard Roth
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Publication number: 20030090273Abstract: In the case of the present-day trend of miniaturizing housed electronic devices, there is the problem that the contact spacings between the terminal pins becomes smaller and smaller and are no longer visible optically. As a result, it also becomes more difficult to solder the contacts of correspondingly designed contact bases, which for example, are designed as test bases, to the individual conductor tracks of the printed circuit board. Possible faulty soldering points, short circuits or interruptions have hitherto been tracked down by laborious manual measurement using the TDR method. The invention proposes producing a test device in which in each case two terminal pins are connected to a short-circuiting bridge. The test device is inserted into the contact base and connects two signal paths of the printed circuit board on which the propagation time of a reflected wave can be measured.Type: ApplicationFiled: November 12, 2002Publication date: May 15, 2003Inventors: Lenart Hauptner, Volker Kilian, Richard Roth, Stefan Sommer
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Publication number: 20030086578Abstract: A tuning circuit for setting a signal propagation time on a signal line in an integrated circuit, particularly a DRAM circuit, has a transistor and a capacitor. A control connection of the transistor is connected to a control unit for the purpose of switchably connecting the capacitor to the signal line through the transistor in order to set the signal propagation time on the signal line on the basis of application of a control signal, generated in the control unit, to the control connection on the transistor.Type: ApplicationFiled: November 8, 2002Publication date: May 8, 2003Inventors: Lenart Hauptner, Volker Kilian, Richard Roth, Stefan Sommer
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Publication number: 20020180472Abstract: The invention relates to a method for measuring the junction temperature in an electronic component. A periodic test signal is led via a signal path inside the component in order to obtain an internal signal. There is a frequency and/or phase relationship between the periodic test signal and a periodic external signal. A phase shift is measured between the internal signal and the external signal. The junction temperature is determined over the component region determined by the signal path as a function of the phase shift.Type: ApplicationFiled: May 30, 2002Publication date: December 5, 2002Inventors: Volker Kilian, Richard Roth
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Patent number: 5786694Abstract: A gradient coil system for a diagnostic magnetic resonance apparatus has two gradient coil arrangements rotated perpendicular to one another, for the production of transverse magnetic field gradients. The two gradient coil arrangements each have several coil pairs arranged along an axis. The coil pairs are each formed by two gradient coils of the segment type. The respective numbers of coil pairs in the two gradient coil arrangements are different from one another, and the gradient coils of the two gradient coil arrangements mutually overlap one another.Type: GrantFiled: March 7, 1997Date of Patent: July 28, 1998Assignee: Siemens AktiengesellschaftInventors: Volker Kilian, Michael Sellers