Abstract: A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner.

Abstract: A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner.

Abstract: Neuromorphic synapse apparatus is provided comprising a synaptic device and a control signal generator. The synaptic device comprises a memory element, disposed between first and second terminals, for conducting a signal between those terminals with an efficacy which corresponds to a synaptic weight in a read mode of operation, and a third terminal operatively coupled to the memory element. The memory element has a non-volatile characteristic, which is programmable to vary the efficacy in response to programming signals applied via the first and second terminals in a write mode of operation, and a volatile characteristic which is controllable to vary the efficacy in response to control signals applied to the third terminal. The control signal generator is responsive to input signals and is adapted to apply control signals to the third terminal in the read and write modes, in dependence on the input signals, to implement predetermined synaptic dynamics.

Abstract: A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner.

Abstract: A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner.

Abstract: The invention is directed to a resistive memory device comprising a control unit for controlling a memory cell of the memory device. The memory cell includes a first terminal, a second terminal and a phase change segment comprising a phase-change material. The phase change segment is arranged between the first terminal and the second terminal. The phase change material is antimony. The phase change segment retains an amorphous region during a write operation. The control unit, during the write operation, applies an electrical programming pulse to the terminals to cause a portion of the phase change segment to transition from a crystalline phase to an amorphous phase comprising the amorphous region. A trailing edge duration of the electrical programming pulse is adjusted based on ambient temperature to prevent re-crystallization of the amorphous region. Shorter trailing edge durations are used at increasing ambient temperatures.

Abstract: A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner.

Abstract: The invention is directed to a resistive memory device comprising a control unit for controlling a memory cell of the memory device. The memory cell includes a first terminal, a second terminal and a phase change segment comprising a phase-change material. The phase change segment is arranged between the first terminal and the second terminal. The phase change material is antimony. The phase change segment retains an amorphous region during a write operation. The control unit, during the write operation, applies an electrical programming pulse to the terminals to cause a portion of the phase change segment to transition from a crystalline phase to an amorphous phase comprising the amorphous region. A trailing edge duration of the electrical programming pulse is adjusted based on ambient temperature to prevent re-crystallization of the amorphous region. Shorter trailing edge durations are used at increasing ambient temperatures.

Abstract: The invention is notably directed to a resistive memory device comprising a control unit for controlling the resistive memory device and a plurality of memory cells. The plurality of memory cells includes a first terminal, a second terminal and a phase change segment comprising a phase-change material for storing information in a plurality of resistance states. The phase change segment is arranged between the first terminal and the second terminal. The phase change material consists of antimony. Furthermore, at least one of the dimensions of the phase change segment is smaller than 15 nanometers. Additional implementations of the resistive memory device include a related method, a related control unit, a related memory cell and a related computer program product.

Abstract: The invention is notably directed to a resistive memory device comprising a control unit for controlling the resistive memory device and a plurality of memory cells. The plurality of memory cells includes a first terminal, a second terminal and a phase change segment comprising a phase-change material for storing information in a plurality of resistance states. The phase change segment is arranged between the first terminal and the second terminal. The phase change material consists of antimony. Furthermore, at least one of the dimensions of the phase change segment is smaller than 15 nanometers. Additional implementations of the resistive memory device include a related method, a related control unit, a related memory cell and a related computer program product.

Abstract: Neuromorphic synapse apparatus is provided comprising a synaptic device and a control signal generator. The synaptic device comprises a memory element, disposed between first and second terminals, for conducting a signal between those terminals with an efficacy which corresponds to a synaptic weight in a read mode of operation, and a third terminal operatively coupled to the memory element. The memory element has a non-volatile characteristic, which is programmable to vary the efficacy in response to programming signals applied via the first and second terminals in a write mode of operation, and a volatile characteristic which is controllable to vary the efficacy in response to control signals applied to the third terminal. The control signal generator is responsive to input signals and is adapted to apply control signals to the third terminal in the read and write modes, in dependence on the input signals, to implement predetermined synaptic dynamics.

Abstract: A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner.

Abstract: A circuit implementing a spiking neural network that includes a learning component that can learn from temporal correlations in the spikes regardless of correlations in the rates. In some embodiments, the learning component comprises a rate-discounting component. In some embodiments, the learning rule computes a rate-normalized covariance (normcov) matrix, detects clusters in this matrix, and sets the synaptic weights according to these clusters. In some embodiments, a synapse with a long-term plasticity rule has an efficacy that is composed by a weight and a fatiguing component. In some embodiments, A Hebbian plasticity component modifies the weight component and a short-term fatigue plasticity component modifies the fatiguing component. The fatigue component increases with increases in the presynaptic spike rate. In some embodiments, the fatigue component increases are implemented in a spike-based manner.

Abstract: A mechanical resonator includes a spring-mass system, wherein the spring-mass system comprises a phase-change material. The mechanical resonator typically comprises an electrical circuit portion, coupled to the phase-change material to alter a phase configuration within the phase-change material. Methods of operation are also disclosed.

Abstract: A method of fabricating a resistive memory element having a layer structure includes: providing a substrate; depositing a first electrode on an upper surface of the substrate; forming a layer of confining material on an upper surface of the first electrode so as to define a cavity having a maximal lateral dimension that is less than 60 nm along a direction parallel to an average plane of the first electrode, the confining material having a thermal conductivity greater than 0.5 W/(m·K); depositing a resistively switchable material as an amorphous compound comprising carbon to fill the cavity; and depositing a second electrode on an upper surface of the resistively switchable material.

Abstract: A mechanical resonator includes a spring-mass system, wherein the spring-mass system comprises a phase-change material. The mechanical resonator typically comprises an electrical circuit portion, coupled to the phase-change material to alter a phase configuration within the phase-change material. Methods of operation are also disclosed.

Abstract: A method of fabricating a resistive memory element having a layer structure includes: providing a substrate; depositing a first electrode on an upper surface of the substrate; forming a layer of confining material on an upper surface of the first electrode so as to define a cavity having a maximal lateral dimension that is less than 60 nm along a direction parallel to an average plane of the first electrode, the confining material having a thermal conductivity greater than 0.5 W/(m·K); depositing a resistively switchable material as an amorphous compound comprising carbon to fill the cavity; and depositing a second electrode on an upper surface of the resistively switchable material.

Abstract: A mechanical resonator includes a spring-mass system, wherein the spring-mass system comprises a phase-change material. The mechanical resonator typically comprises an electrical circuit portion, coupled to the phase-change material to alter a phase configuration within the phase-change material. Methods of operation are also disclosed.

Abstract: A resistive memory element is provided having a layer structure. The layer structure includes two layers forming two electrically conductive electrodes, respectively, a resistively switchable material sandwiched between the two layers forming the two electrodes, and in electrical connection therewith, and a confining material. The resistively switchable material is laterally confined within the confining material, between the two layers forming the electrodes. The confining material is sufficiently electrically insulating for an electric signal applied between the two conductive electrodes to change a resistance state of the memory element in operation. The confining material has a thermal conductivity greater than 0.5 W/(m·K), and preferably greater than or equal to 30 W/(m·K). The resistively switchable material is an amorphous compound comprising carbon, which has a maximal lateral dimension, along a direction parallel to an average plane of the two layers forming the electrodes, that is less than 60 nm.

Abstract: A resistive memory element is provided having a layer structure. The layer structure includes two layers forming two electrically conductive electrodes, respectively, a resistively switchable material sandwiched between the two layers forming the two electrodes, and in electrical connection therewith, and a confining material. The resistively switchable material is laterally confined within the confining material, between the two layers forming the electrodes. The confining material is sufficiently electrically insulating for an electric signal applied between the two conductive electrodes to change a resistance state of the memory element in operation. The confining material has a thermal conductivity greater than 0.5 W/(m·K), and preferably greater than or equal to 30 W/(m·K). The resistively switchable material is an amorphous compound comprising carbon, which has a maximal lateral dimension, along a direction parallel to an average plane of the two layers forming the electrodes, that is less than 60 nm.