Patents by Inventor Waclaw Godycki
Waclaw Godycki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11539329Abstract: A wideband envelope modulator comprises a direct current (DC)-to-DC switching converter connected in series with a linear amplitude modulator (LAM). The DC-DC switching converter includes a pulse-width modulator that generates a PWM signal with modulated pulse widths representing a time varying magnitude of an input envelope signal or a pulse-density modulator that generates a PDM signal with a modulated pulse density representing the time varying magnitude of the input envelope signal, a field-effect transistor (FET) driver stage that generates a differential PWM or PDM drive signal, a high-power output switching stage that is driven by the PWM or PDM drive signal, and an output energy storage network including a low-pass filter (LPF) of order greater than two that filters a switching voltage produced at an output switching node of the high-power output switching stage.Type: GrantFiled: May 13, 2021Date of Patent: December 27, 2022Assignee: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Publication number: 20210265952Abstract: A wideband envelope modulator comprises a direct current (DC)-to-DC switching converter connected in series with a linear amplitude modulator (LAM). The DC-DC switching converter includes a pulse-width modulator that generates a PWM signal with modulated pulse widths representing a time varying magnitude of an input envelope signal or a pulse-density modulator that generates a PDM signal with a modulated pulse density representing the time varying magnitude of the input envelope signal, a field-effect transistor (FET) driver stage that generates a differential PWM or PDM drive signal, a high-power output switching stage that is driven by the PWM or PDM drive signal, and an output energy storage network including a low-pass filter (LPF) of order greater than two that filters a switching voltage produced at an output switching node of the high-power output switching stage.Type: ApplicationFiled: May 13, 2021Publication date: August 26, 2021Applicant: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Patent number: 11038466Abstract: A wideband envelope modulator comprises a direct current (DC)-to-DC switching converter connected in series with a linear amplitude modulator (LAM). The DC-DC switching converter includes a pulse-width modulator that generates a PWM signal with modulated pulse widths representing a time varying magnitude of an input envelope signal or a pulse-density modulator that generates a PDM signal with a modulated pulse density representing the time varying magnitude of the input envelope signal, a field-effect transistor (FET) driver stage that generates a PWM or PDM drive signal, a high-power output switching stage that is driven by the PWM or PDM drive signal, and an output energy storage network including a low-pass filter (LPF) of order greater than two that filters a switching voltage produced at an output switching node of the high-power output switching stage.Type: GrantFiled: August 19, 2019Date of Patent: June 15, 2021Assignee: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Publication number: 20210058035Abstract: A wideband envelope modulator comprises a direct current (DC)-to-DC switching converter connected in series with a linear amplitude modulator (LAM). The DC-DC switching converter includes a pulse-width modulator that generates a PWM signal with modulated pulse widths representing a time varying magnitude of an input envelope signal or a pulse-density modulator that generates a PDM signal with a modulated pulse density representing the time varying magnitude of the input envelope signal, a field-effect transistor (FET) driver stage that generates a PWM or PDM drive signal, a high-power output switching stage that is driven by the PWM or PDM drive signal, and an output energy storage network including a low-pass filter (LPF) of order greater than two that filters a switching voltage produced at an output switching node of the high-power output switching stage.Type: ApplicationFiled: August 19, 2019Publication date: February 25, 2021Applicant: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Patent number: 10778111Abstract: A current regulating apparatus capable of regulating an electrical current with a high level of precision and over a wide range of voltages includes a first depletion mode field-effect transistor (FET), a second depletion mode FET, and a fixed resistor. The second depletion mode FET and fixed resistor are connected in series and across the gate-source terminals of the first depletion mode FET. The first depletion mode FET operates as an adjustable current source while the second depletion mode FET is controlled to operate as a voltage controlled resistor. The magnitude of current regulated by the current regulating apparatus is determined based on both the resistance of the fixed resistor and a current-setting control voltage applied to the gate of the second depletion mode FET. Various precision values of regulated current can be realized by simply changing the current-setting control voltage.Type: GrantFiled: September 13, 2019Date of Patent: September 15, 2020Assignee: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Patent number: 10707822Abstract: A dynamic power supply (DPS) for polar modulation transmitters and envelope tracking (ET) transmitters includes a direct current (DC)-DC converter, a linear amplitude modulator (LAM) connected in series with the DC-DC converter, and a controller that dynamically controls both the switching of the DC-DC converter and the magnitude of the LAM's reference voltage, depending on time-varying changes in an input envelope voltage Venv. The DC-DC converter includes a high-power buck switching stage and an output energy storage network having a third-order or higher low-pass filter (LPF). The third-order or higher LPF filters out switching noise and ripple from the switching voltage produced by the high-power buck switching stage, and in one embodiment of the invention is augmented by a damping network that eliminates undesirable ringing at the power supply input of the LAM, thereby increasing efficiency and DPS conversion precision.Type: GrantFiled: September 7, 2019Date of Patent: July 7, 2020Assignee: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Patent number: 10084448Abstract: A driver interface for a switch-based circuit includes an AC coupling capacitor, a first diode or a first series of diodes, and a second diode or a second series of diodes connected in series with the first diode or first series of diodes but with an opposing polarity. The AC coupling capacitor removes a DC voltage from an input bi-level drive signal that does not have the appropriate high and low drive levels needed to switch a FET in the switch-based circuit between fully ON and fully OFF states. The first diode or first series of diodes and the second diode or second series of diodes clamp the resulting AC-coupled drive signal to produce an output bi-level drive signal having the high and low drive levels needed to switch the FET between fully ON and fully OFF states. The driver interface maintains the high and low drive levels of the output bi-level drive signal irrespective of any changes made to the duty cycle or pulse density of the input bi-level drive signal.Type: GrantFiled: June 8, 2016Date of Patent: September 25, 2018Assignee: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Publication number: 20180262192Abstract: A driver interface for a switch-based circuit includes an AC coupling capacitor, a first diode or a first series of diodes, and a second diode or a second series of diodes connected in series with the first diode or first series of diodes but with an opposing polarity. The AC coupling capacitor removes a DC voltage from an input bi-level drive signal that does not have the appropriate high and low drive levels needed to switch a FET in the switch-based circuit between fully ON and fully OFF states. The first diode or first series of diodes and the second diode or second series of diodes clamp the resulting AC-coupled drive signal to produce an output bi-level drive signal having the high and low drive levels needed to switch the FET between fully ON and fully OFF states. The driver interface maintains the high and low drive levels of the output bi-level drive signal irrespective of any changes made to the duty cycle or pulse density of the input bi-level drive signal.Type: ApplicationFiled: May 10, 2018Publication date: September 13, 2018Applicant: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Publication number: 20170359060Abstract: A driver interface for a switch-based circuit includes an AC coupling capacitor, a first diode or a first series of diodes, and a second diode or a second series of diodes connected in series with the first diode or first series of diodes but with an opposing polarity. The AC coupling capacitor removes a DC voltage from an input bi-level drive signal that does not have the appropriate high and low drive levels needed to switch a FET in the switch-based circuit between fully ON and fully OFF states. The first diode or first series of diodes and the second diode or second series of diodes clamp the resulting AC-coupled drive signal to produce an output bi-level drive signal having the high and low drive levels needed to switch the FET between fully ON and fully OFF states. The driver interface maintains the high and low drive levels of the output bi-level drive signal irrespective of any changes made to the duty cycle or pulse density of the input bi-level drive signal.Type: ApplicationFiled: June 8, 2016Publication date: December 14, 2017Applicant: Eridan Communications, Inc.Inventor: Waclaw Godycki
-
Patent number: 9468038Abstract: A distributed wireless sensor network includes two or more wireless nodes adapted for sensing a condition at any first node, first programming located within each node for transmitting a signal representing the sensed condition from the first node to another node, second programming located within each node for receiving the signal transmitted from any other node and for retransmitting a received signal representing the sensed condition along with additional data indicating the number of retransmissions of the signal between nodes.Type: GrantFiled: May 2, 2011Date of Patent: October 11, 2016Assignee: Cornell UniversityInventors: Rajeev K. Dokania, Xiao Y. Wang, Carlos I. Dorta-Quinones, Waclaw Godycki, Alyssa B. Apsel
-
Publication number: 20130155904Abstract: A distributed wireless sensor network includes two or more wireless nodes adapted for sensing a condition at any first node, first programming located within each node for transmitting a signal representing the sensed condition from the first node to another node, second programming located within each node for receiving the signal transmitted from any other node and for retransmitting a received signal representing the sensed condition along with additional data indicating the number of retransmissions of the signal between nodes.Type: ApplicationFiled: May 2, 2011Publication date: June 20, 2013Inventors: Rajeev K. Dokania, Xiao Y. Wang, Carlos I. Dorta-Quinones, Waclaw Godycki, Alyssa B. Apsel