Abstract: Described embodiments process data packets received that include a source address and at least one destination address. If the destination address is stored in a memory of an I/O adapter, the received data packet is processed in accordance with bridging rules associated with each destination address stored in the I/O adapter memory. If the destination address is not stored in the I/O adapter memory, the I/O adapter sends a task message to a processor to determine whether the destination address is stored in an address table stored in a shared memory of the network processor. The I/O adapter memory has lower access latency than the address table. If the destination address is stored in the address table, the received data packet is processed in accordance with bridging rules stored in the address table and the bridging rules stored in the I/O adapter memory are updated.

Abstract: Described embodiments provide a system having at least two network processors that each have a plurality of processing modules. The processing modules process a packet in a task pipeline by transmitting task messages to other processing modules on a task ring, the task messages related to desired processing of the packet. A series of tasks within a network processor may result in no processing or reduced processing for certain processing modules creating a virtual pipeline depending on the packet received by the network processor. At least two of the network processors communicate tasks. This communication allows ter the extension of the virtual pipeline of or IC network processor to at least two network processors.

Abstract: In described embodiments, a timestamp generator includes a fixed clock domain driven by a fixed frequency clock, a core clock domain, coupled to the fixed clock domain, which is driven by a core clock whose frequency is adjustable during an operation of the timestamp generator. A timestamp logic operating in the core clock domain generates a timestamping output of the timestamp generator. A rate generator operating in both the fixed clock domain and the core clock domain generates per clock cycle increments in the fixed clock domain and transfers carry units from the fixed clock domain into the core clock domain, and a timestamp increment generation of the timestamp logic is clocked by the fixed frequency clock provided by the rate generator. A method for enabling timestamp in an ASIC to be accurate with system clock changes is also described.

Abstract: Described embodiments provide a system having at least two network processors that each have a plurality of processing modules. The processing modules process a packet in a task pipeline by transmitting task messages to other processing modules on a task ring, the task messages related to desired processing of the packet. A series of tasks within a network processor may result in no processing or reduced processing for certain processing modules creating a virtual pipeline depending on the packet received by the network processor. At least two of the network processors communicate tasks. This communication allows ter the extension of the virtual pipeline of or IC network processor to at least two network processors.

Abstract: In one embodiment, queues associated with a first traffic class (FTC) are selected for service. Each FTC queue having at least one enqueued cell is identified as an occupied FTC queue, Where at least one FTC queue is provisioned for burst scheduling of multiple cells when serviced. An occupied FTC queue provisioned for burst scheduling is identified as a super-occupied FTC queue when the number of cells enqueued is greater than a specified number. Each occupied FTC queue is set as eligible for service based on a FTC scheduling algorithm. An eligible FTC queue is selected for service based on a corresponding sub-priority of each eligible FTC queue. Each FTC queue is assigned a sub-priority based on a service level of a connection associated with enqueued cells. When the super-occupied queue is serviced, the number of cells dequeued is based on a burst size.

Abstract: The present invention relates to a process for the production of xylitol. Specifically the process comprises two reaction steps. The first step is the fermentative conversion of a hexose to a pentitol. The second step is the catalytic chemical isomerisation of the pentitol to xylitol. Optionally, the xylitol is separated from the other pentitols.

Abstract: A scheduler allocates service to enqueued cells of connections provisioned for guaranteed service levels employing a structure with one or more of the following features to achieve efficient high-speed packet switching (cell relay). For very high-speed switching of connections, such switches operating up to 10, or even 100, Tbps, burst scheduling of cells is employed in which a number of cells, termed a burst, are serviced when a queue is eligible for service. When a queue has less than the number of cells in the burst (termed a short burst), the scheduler still schedules service, but accounts for saved service time (or bandwidth) of the short burst via queue length when the queue's eligibility is next considered for service. In addition, high and low bandwidth connections of a queue may be allocated into two sub-queues, with priority assigned to the two queues and delay-sensitive traffic (high bandwidth connections) assigned to the higher priority sub-queue.

Abstract: The present invention discloses an isotonic beverage product for direct increase of the muscular ATP level consisting essentially of a solution of D-ribose and blood glucose increasing monosaccharides and oligosaccharides and/or hydrogenated glucose syrups. These drinks serve to increase the overall performance during physical exercise and at the same time diminish fatigue.

Abstract: The present invention discloses that retrograded starch having more than 55% resistant starch with >50% chains of DP 10-35 gives rise to a significantly higher amount of n-butyrate production under conditions simulating the human colon. It is expected that such an increased n-butyrate production will diminish the development of colon diseases notably of colon cancer.

Abstract: The present invention describes a method for the production of isomalto-oligosaccharides syrups. The method comprises the use of enzymes immobilized on a re-usable carrier. The carrier is preferably an anion exchanger. The enzymes used for the conversion of starch hydrolysates are transglucosidase and pullulanase preferably these enzymes are co-immobilized. The carrier/enzyme conjugate is further reinforced by cross-linking.

Abstract: This process for the production of 2-keto-D-gluconic acid starts from D-glucose. D-glucose is catalytically oxidised using molecular oxygen in a one-pot process. The oxidation is performed in the presence of well-known Pt/Pb catalysts. The initial reaction to D-gluconic acid is performed at constant pH between 7 and 10. There after the reaction is continued without pH control. This process results in a high selectivity compared with known processes.

Abstract: A method is disclosed for producing a pentitol. The disclosed method more particularly relates to producing arabinitol from hexoses, e.g. galactose and/or glucose, and/or fructose, or lactose hydrolysate, or invert sugar, or starch hydrolysates. The hexose is oxidatively decarboxylated to a C.sub.5 -aldonic acid which is thereafter catalytically hydrogenated to obtain the desired arabinitol.

Abstract: The present invention discloses a chemical method for producing meso-erythritol. The method comprises catalytic hydrogenation of tartaric acid. The tetritol mixture resulting from the hydrogenation can be separated into its components. Alternatively selected components can be isomerized prior to such a separation.