Patents by Inventor Walter Allen
Walter Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240095370Abstract: In one embodiment, a device obtains transaction data regarding a transaction attempted within a software development environment, wherein the transaction data is captured by instrumentation code inserted into the software development environment at runtime. The device identifies, based on the transaction data, an access policy for the transaction. The device makes, based on the access policy, a determination that the transaction is not authorized. The device causes, via the instrumentation code, the transaction to be blocked from completing within the software development environment.Type: ApplicationFiled: September 21, 2022Publication date: March 21, 2024Inventors: Walter Theodore Hulick, Jr., David John ZACKS, Thomas SZIGETI, Jeffrey Allen TILLETT
-
Publication number: 20230401147Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: ApplicationFiled: March 20, 2023Publication date: December 14, 2023Inventors: Walter Allen, Robert France
-
Patent number: 11609847Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: GrantFiled: August 16, 2021Date of Patent: March 21, 2023Assignee: MONTEREY RESEARCH, LLCInventors: Walter Allen, Robert France
-
Patent number: 11476624Abstract: A novel system for installing, wiring and controlling electrical outlets is disclosed. The system includes a mounting bracket, a self-contained receptacle, and an option control module. The mounting bracket has preconfigured embedded conductors to facilitate the mounting of electrical outlets thereto. The self-contained receptacle includes a self-contained electrical outlet having face-mounted counter bored connecting screws for electrically connecting the self-contained receptacle to the embedded conductors of the mounting bracket. The optional control module may wirelessly receive instructions for controlling an electrical output of the self-contained receptacle.Type: GrantFiled: August 6, 2021Date of Patent: October 18, 2022Inventor: Walter Allen
-
Patent number: 11294342Abstract: A system for managing process automation with a macro bot is provided. By allowing for modifications to RPA bot behavior without changing the code of the RPA bots and providing for an efficient querying and reporting function, the system addresses a number of computer technology-centric challenges. The system allows the entity to push updates to bot behavior through a rules database without individually reconfiguring each bot. This ensures that the functionality of the bots may be updated for future entity needs and objectives while minimizing bot downtime. Furthermore, providing updates without changing the code of the bots allows the system to increase computing efficiency by reducing the demands on computer resources associated with applying a system-wide update, such as processing power, memory space, storage space, cache space, electric power, and networking bandwidth.Type: GrantFiled: October 9, 2020Date of Patent: April 5, 2022Assignee: BANK OF AMERICA CORPORATIONInventors: Nye Walter Allen, IV, Vinaykumar Mummigatti, Ryan Eric Davis
-
Publication number: 20210374052Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: ApplicationFiled: August 16, 2021Publication date: December 2, 2021Inventors: Walter Allen, Robert France
-
Patent number: 11093383Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: GrantFiled: February 11, 2019Date of Patent: August 17, 2021Assignee: MONTEREY RESEARCH, LLCInventors: Walter Allen, Robert France
-
Publication number: 20210041845Abstract: A system for managing process automation with a macro bot is provided. By allowing for modifications to RPA bot behavior without changing the code of the RPA bots and providing for an efficient querying and reporting function, the system addresses a number of computer technology-centric challenges. The system allows the entity to push updates to bot behavior through a rules database without individually reconfiguring each bot. This ensures that the functionality of the bots may be updated for future entity needs and objectives while minimizing bot downtime. Furthermore, providing updates without changing the code of the bots allows the system to increase computing efficiency by reducing the demands on computer resources associated with applying a system-wide update, such as processing power, memory space, storage space, cache space, electric power, and networking bandwidth.Type: ApplicationFiled: October 9, 2020Publication date: February 11, 2021Applicant: BANK OF AMERICA CORPORATIONInventors: Nye Walter Allen, IV, Vinaykumar Mummigatti, Ryan Eric Davis
-
Patent number: 10802453Abstract: A system for managing process automation with a macro bot is provided. By allowing for modifications to RPA bot behavior without changing the code of the RPA bots and providing for an efficient querying and reporting function, the system addresses a number of computer technology-centric challenges. The system allows the entity to push updates to bot behavior through a rules database without individually reconfiguring each bot. This ensures that the functionality of the bots may be updated for future entity needs and objectives while minimizing bot downtime. Furthermore, providing updates without changing the code of the bots allows the system to increase computing efficiency by reducing the demands on computer resources associated with applying a system-wide update, such as processing power, memory space, storage space, cache space, electric power, and networking bandwidth.Type: GrantFiled: June 2, 2017Date of Patent: October 13, 2020Assignee: BANK OF AMERICA CORPORATIONInventors: Nye Walter Allen, IV, Vinaykumar Mummigatti, Ryan Eric Davis
-
Patent number: 10783229Abstract: Systems, computer program products, and methods are described herein for implementing a robotic process automation using controller execution model. The present invention is configured to receive electronically, from a user computing device, a request to establish a communication link with a hosted virtual desktop (HVD) bot; determine a controller hosted virtual desktop (CHVD) hub associated with the HVD bot, wherein the CHVD hub comprises one or more HVD bots connected to the CHVD hub in a hub-and-spoke configuration, wherein the HVD bot is accessible only via the CHVD hub; receive one or more authentication credentials associated with the CHVD from an encrypted credential repository; validate the one or more authentication credentials associated with the CHVD, wherein validating further comprises authorizing the user computing device to access to the CHVD hub; and establish a communication link between the user computing device and the HVD bot, via the CHVD.Type: GrantFiled: November 18, 2019Date of Patent: September 22, 2020Assignee: Bank of America CorporationInventors: Nagaraju Buddhiraju, Nye Walter Allen
-
Publication number: 20200089860Abstract: Systems, computer program products, and methods are described herein for implementing a robotic process automation using controller execution model. The present invention is configured to receive electronically, from a user computing device, a request to establish a communication link with a hosted virtual desktop (HVD) bot; determine a controller hosted virtual desktop (CHVD) hub associated with the HVD bot, wherein the CHVD hub comprises one or more HVD bots connected to the CHVD hub in a hub-and-spoke configuration, wherein the HVD bot is accessible only via the CHVD hub; receive one or more authentication credentials associated with the CHVD from an encrypted credential repository; validate the one or more authentication credentials associated with the CHVD, wherein validating further comprises authorizing the user computing device to access to the CHVD hub; and establish a communication link between the user computing device and the HVD bot, via the CHVD.Type: ApplicationFiled: November 18, 2019Publication date: March 19, 2020Applicant: Bank of America CorporationInventors: Nagaraju Buddhiraju, Nye Walter Allen, IV
-
Patent number: 10482232Abstract: Systems, computer program products, and methods are described herein for implementing a robotic process automation using controller execution model. The present invention is configured to receive electronically, from a user computing device, a request to establish a communication link with a hosted virtual desktop (HVD) bot; determine a controller hosted virtual desktop (CHVD) hub associated with the HVD bot, wherein the CHVD hub comprises one or more HVD bots connected to the CHVD hub in a hub-and-spoke configuration, wherein the HVD bot is accessible only via the CHVD hub; receive one or more authentication credentials associated with the CHVD from an encrypted credential repository; validate the one or more authentication credentials associated with the CHVD, wherein validating further comprises authorizing the user computing device to access to the CHVD hub; and establish a communication link between the user computing device and the HVD bot, via the CHVD.Type: GrantFiled: August 16, 2017Date of Patent: November 19, 2019Assignee: Bank of America CorporationInventors: Nagaraju Buddhiraju, Nye Walter Allen, IV
-
Publication number: 20190171562Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: ApplicationFiled: February 11, 2019Publication date: June 6, 2019Inventors: Walter Allen, Robert France
-
Patent number: 10228371Abstract: A liposomal composition comprising a sterol-modified lipid and a purified mycobacterial lipid cell wall component or analog or derivative thereof is described. The composition is useful as a lipid antigen-presenting vehicle for the detection of lipid antigen specific biomarker antibodies in antibody containing biological samples in the diagnosis of active tuberculosis. The purified lipid cell wall component is typically a purified mycolic acid or a mixture of mycolic acids from a mycobacterium that produces mycolic acids. The sterol-modified lipid is typically a phospholipid.Type: GrantFiled: June 7, 2013Date of Patent: March 12, 2019Assignee: University of PretoriaInventors: Carl Baumeister, Walter Allen Shaw, Jan Adrianus Verschoor
-
Publication number: 20190057203Abstract: Systems, computer program products, and methods are described herein for implementing a robotic process automation using controller execution model. The present invention is configured to receive electronically, from a user computing device, a request to establish a communication link with a hosted virtual desktop (HVD) bot; determine a controller hosted virtual desktop (CHVD) hub associated with the HVD bot, wherein the CHVD hub comprises one or more HVD bots connected to the CHVD hub in a hub-and-spoke configuration, wherein the HVD bot is accessible only via the CHVD hub; receive one or more authentication credentials associated with the CHVD from an encrypted credential repository; validate the one or more authentication credentials associated with the CHVD, wherein validating further comprises authorizing the user computing device to access to the CHVD hub; and establish a communication link between the user computing device and the HVD bot, via the CHVD.Type: ApplicationFiled: August 16, 2017Publication date: February 21, 2019Inventors: Nagaraju Buddhiraju, Nye Walter Allen, IV
-
Patent number: 10204041Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: GrantFiled: August 14, 2017Date of Patent: February 12, 2019Assignee: Monterey Research, LLCInventors: Walter Allen, Robert France
-
Publication number: 20180345489Abstract: A system for managing process automation with a macro bot is provided. By allowing for modifications to RPA bot behavior without changing the code of the RPA bots and providing for an efficient querying and reporting function, the system addresses a number of computer technology-centric challenges. The system allows the entity to push updates to bot behavior through a rules database without individually reconfiguring each bot. This ensures that the functionality of the bots may be updated for future entity needs and objectives while minimizing bot downtime. Furthermore, providing updates without changing the code of the bots allows the system to increase computing efficiency by reducing the demands on computer resources associated with applying a system-wide update, such as processing power, memory space, storage space, cache space, electric power, and networking bandwidth.Type: ApplicationFiled: June 2, 2017Publication date: December 6, 2018Inventors: Nye Walter Allen, IV, Vinaykumar Mummigatti, Ryan Eric Davis
-
Publication number: 20180137046Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: ApplicationFiled: August 14, 2017Publication date: May 17, 2018Inventors: Walter Allen, Robert France
-
Patent number: 9734049Abstract: Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.Type: GrantFiled: July 2, 2012Date of Patent: August 15, 2017Assignee: MONTEREY RESEARCH, LLCInventors: Walter Allen, Robert France
-
Publication number: 20150111219Abstract: A liposomal composition comprising a sterol-modified lipid and a purified mycobacterial lipid cell wall component or analog or derivative thereof is described. The composition is useful as a lipid antigen-presenting vehicle for the detection of lipid antigen specific biomarker antibodies in antibody containing biological samples in the diagnosis of active tuberculosis. The purified lipid cell wall component is typically a purified mycolic acid or a mixture of mycolic acids from a mycobacterium that produces mycolic acids. The sterol-modified lipid is typically a phospholipid.Type: ApplicationFiled: June 7, 2013Publication date: April 23, 2015Applicant: University of PretoriaInventors: Carl Baumeister, Walter Allen Shaw, Jan Adrianus Verschoor