Patents by Inventor Walter F. Krolikowski

Walter F. Krolikowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4443932
    Abstract: Improved self-aligned semiconductor devices are made using two sets of superposed pattern forming layers; a master mask layer set containing the self-aligned patterns, and a pattern selector layer set which allows different apertures in the master mask layer to be selectively re-opened so that different device regions may be sequentially formed. The master mask layer is a double layer of a first material resistant to typical device forming processes, covered by a second etch stop material. The selector layer may be a single process resistant material or a double layer. Using combinations of silicon oxide and nitride, the process is applied to the formation of silicon islands with emitters and emitter, base, and collector contacts self-aligned to each other and a surrounding oxide isolation region. Significant area and cost savings are achieved without additional masking steps or precision alignments.
    Type: Grant
    Filed: January 18, 1982
    Date of Patent: April 24, 1984
    Assignee: Motorla, Inc.
    Inventors: Sal Mastroianni, Walter F. Krolikowski
  • Patent number: 3969750
    Abstract: A diffused junction capacitor having two P.sup.+ N.sup.+ junctions, one in the semiconductor substrate and one in an epitaxial layer thereon and exhibiting high capacitance per unit area.A method for forming such a capacitor makes use of the fact that the outdiffusion rate for boron is much faster than the outdiffusion rate for arsenic, whereby, for instance, boron and arsenic diffused into the surface of a semiconductor wafer can, after the growth of an N.sup.- epitaxial layer, be diffused into the N.sup.- epitaxial layer. Since the boron outdiffuses much faster, it will cover a larger area than the arsenic outdiffusion. This will, in turn, result in two P.sup.+-N.sup.+ junctions, one in the substrate and one in the N.sup.- epitaxial layer.
    Type: Grant
    Filed: December 3, 1975
    Date of Patent: July 13, 1976
    Assignee: International Business Machines Corporation
    Inventors: Vir A. Dhaka, Walter F. Krolikowski