Abstract: A digital phase and frequency comparator circuit establishes phase and frequency windows to determine if two AC signals are in phase and of substantially the same frequency. A phase difference between the two signals is determined by exclusively ORing the two signals and timing the duration of a signal state to determine if the phase difference exceeds a threshold. The two AC signals are also ANDed and counted to determine the frequency agreement.

Abstract: A waveform synthesizer is controlled in response to a stored program control utilizing tabular data stored in memory as the basis for generating timing signals to drive the power switching devices of the synthesizer. A plurality of tables of differing modulation indices define rated current output and a below rated current output. The table defines rated level output timing signals as both pulse width and frequency modulated to reduce harmonics. Various overload conditions result in selection of different modulation indices or a total current shutdown. A high peak current overload results in a halt in a progressive upward selection of modulation indices during start-up. A high average current overload results in a reduction in modulation indices until the overload has cleared.

Abstract: A control arrangement for a three-phase, uninterruptible power supply generates timing signals to drive the static switches of inverters located in each phase. This control arrangement precisely controls the phase differences of the inverter signals with relation to each other so that while the overall three-phase power supplied by the inverters is nulled, power circulation through the inverters compensates for unbalanced output loads thereby maintaining balanced phase angles between the output voltage and a balanced input impedance at the input of the power supply.