Abstract: A dual injector, floating-gate MOS non-volatile semiconductor memory device (DIFMOS) has been fabricated, wherein the electron injection means comprises a p+n+ junction, the n+ region thereof having a critical dopant concentration, controlled by ion implantation. The junction is avalanched to "write" a charge on the floating gate, and a hole injector junction (n+/p-) is avalanched to "erase" the charge. An MOS sensing transistor, whose gate is an extension of the floating gate, "reads" the presence or absence of charge on the floating gate. In a preferred embodiment, the hole injection means includes an MOS "bootstrap" capacitor for coupling a voltage bias to the floating gate.

Abstract: Disclosed is a method of fabricating a vertical multi-junction cell and the solar cell produced thereby, utilizing an orientation dependent etch to selectively provide parallel grooves in monocrystalline silicon body, followed by the introduction of doping impurities of the opposite conductivity type from the silicon body to provide PN junctions. In some instances the grooves are filled with silicon of the same conductivity type as the silicon body.