Patents by Inventor Wan Gyu Lee

Wan Gyu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11975037
    Abstract: The present specification relates to a composition for preventing, alleviating or treating burnout syndrome, containing a natural extract as an active ingredient. According to one aspect of the present invention, the composition contains a ginseng fruit extract, and thus is useful for preventing, treating and alleviating burnout syndrome. In addition, according to one aspect of the present invention, the composition further contains ginseng fruit and one or more selected from the group consisting of red ginseng, Angelica gigas, Cornus officinalis, Cervi parvum corni, and Nigella sativa, so as to maximize the synergistic effect among two or more ingredients, thereby exhibiting excellent effects on the prevention, treatment and alleviation of burnout syndrome. Therefore, there is an advantage of making individuals and society mentally and physically healthy since burnout syndrome can be prevented, treated and alleviated, by using the composition of the present invention.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: May 7, 2024
    Assignee: AMOREPACIFIC CORPORATION
    Inventors: Su-Hwan Kim, Chan-Woong Park, Sun Mi Kim, Juewon Kim, Byung Gyu Kim, Wan Gi Kim, Sang Jun Lee
  • Patent number: 6855592
    Abstract: A method for manufacturing a semiconductor device is disclosed, in which characteristics of the semiconductor device and an operation speed are improved. In forming sidewall spacers at both sides of a gate electrode, a semiconductor substrates is partially removed at both sides of the sidewall spacer by controlling an etch gas, and then a process for forming a silicide layer is performed, thereby increasing a distance between the silicide layer and a channel. Accordingly, it is possible to decrease a resistance material between the silicide layer and the channel region.
    Type: Grant
    Filed: November 7, 2002
    Date of Patent: February 15, 2005
    Assignee: Hynix Semiconductor Inc.
    Inventor: Wan Gyu Lee
  • Publication number: 20030113988
    Abstract: A method for manufacturing a semiconductor device is disclosed, in which characteristics of the semiconductor device and an operation speed are improved. In forming sidewall spacers at both sides of a gate electrode, a semiconductor substrates is partially removed at both sides of the sidewall spacer by controlling an etch gas, and then a process for forming a silicide layer is performed, thereby increasing a distance between the silicide layer and a channel. Accordingly, it is possible to decrease a resistance material between the silicide layer and the channel region.
    Type: Application
    Filed: November 7, 2002
    Publication date: June 19, 2003
    Applicant: Hynix Semiconductor Inc.
    Inventor: Wan Gyu Lee
  • Publication number: 20030003723
    Abstract: Disclosed is a method for manufacturing semiconductor device capable of performing a low resistance in a self-align TiSi2. The method for manufacturing semiconductor device includes the steps of: a) forming a semiconductor layer including a silicon layer formed on a portion of a semiconductor substrate; b) forming a Ti layer and a TiN layer on the semiconductor layer; c) applying a first thermal treatment to the Ti layer for forming a TiSi2 layer on the semiconductor layer; d) after forming the TiSi2 layer, removing a Ti layer and the TiN layer which are not reacted; and e) applying a second thermal treatment to the TiSi2 layer for phase transition of the TiSi2 layer.
    Type: Application
    Filed: September 28, 2001
    Publication date: January 2, 2003
    Inventor: Wan-Gyu Lee