Patents by Inventor Warren D. Farnworth

Warren D. Farnworth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5059899
    Abstract: Disclosed is a method for producing individual semiconductor chips which are singulated from larger wafers, and singulated wafers produced according to the method. Wafers from which the singulated dies are produced include scribe line area through which the wafer is cut by a saw or other method for singulating individual dies. In one aspect of the invention, test pads are provided within the scribe line area for testing of individual dies prior to severing of the wafer. In another aspect of the invention, conventional test circuitry is formed within the scribe line area and utilized in conjunction with text pads for testing operability of individual wafers prior to severing of the wafer into individual chips. Upon test, the scribe lines are severed effectively destroying the sacrificial test pads and circuitry.
    Type: Grant
    Filed: August 16, 1990
    Date of Patent: October 22, 1991
    Assignee: Micron Technology, Inc.
    Inventors: Warren D. Farnworth, Kevin Duesman, Ed Heitzeberg