Abstract: The present invention relates to a multipurpose drill system, the multipurpose drill system comprising: a drilling rig adapted to drive a drilling assembly; and two or more power sources, wherein at least one of the two or more power sources is a high pressure power source, wherein the drilling assembly is adapted to be in communication with either or both of the two or more power sources.

Abstract: A centrifugal rotor device includes a first chamber configured to hold a fluid, and a second chamber configured to receive the fluid from the first chamber. The centrifugal rotor device also includes a conduit coupled to the first chamber at a conduit inlet and coupled to the second chamber at a conduit outlet, the conduit configured to permit movement of the fluid from the first chamber to the second chamber. The conduit includes a first channel and a second channel formed adjacent to the first channel. The second channel is in fluid communication with the first channel and has a dimension smaller than the smallest dimension of the first channel. The conduit also includes one or more obstructive features present in the second channel configured to impede movement of the fluid in the second channel.

Abstract: Described herein are various embodiments directed to rotor devices, systems, and kits. Embodiments of rotors disclosed herein may be used to characterize one or more analytes of a fluid. An apparatus may include a first layer defining a channel, a set of wells, and a cavity. A second layer may be coupled to the first layer. The second layer may include a protrusion extending towards the first layer. The second layer may define an opening configured to receive a fluid. The channel may establish a fluid communication path between the opening and the set of wells. A container may be slidable within the cavity during use. The protrusion may be configured to penetrate a wall of the container.

Abstract: A centrifugal rotor device includes a first chamber configured to hold a fluid, and a second chamber configured to receive the fluid from the first chamber. The centrifugal rotor device also includes a conduit coupled to the first chamber at a conduit inlet and coupled to the second chamber at a conduit outlet, the conduit configured to permit movement of the fluid from the first chamber to the second chamber. The conduit includes a first channel and a second channel formed adjacent to the first channel. The second channel is in fluid communication with the first channel and has a dimension smaller than the smallest dimension of the first channel. The conduit also includes one or more obstructive features present in the second channel configured to impede movement of the fluid in the second channel.

Abstract: A vehicle bumper assembly includes a bumper beam and a crash box. At least one of the bumper beam or the crash box is cast from metal, such as aluminum or magnesium, to reduce weight, reduce manufacturing process steps, and improve performance characteristics of the bumper assembly. In an embodiment, both of the bumper beam and the crash box are cast from metal to establish an integral connection therebetween. One of the bumper beam or the crash box can be open along a top and bottom portion of the bumper assembly and include at least one reinforcing rib cast integral therewith. In an embodiment, both of the bumper beam and the crash box can be open along a top and bottom portion of the bumper assembly and each include at least one reinforcing rib cast integral therewith.

Abstract: A vehicle bumper assembly includes a bumper beam and a crash box. At least one of the bumper beam or the crash box is cast from metal, such as aluminum or magnesium, to reduce weight, reduce manufacturing process steps, and improve performance characteristics of the bumper assembly. In an embodiment, both of the bumper beam and the crash box are cast from metal to establish an integral connection therebetween. One of the bumper beam or the crash box can be open along a top and bottom portion of the bumper assembly and include at least one reinforcing rib cast integral therewith. In an embodiment, both of the bumper beam and the crash box can be open along a top and bottom portion of the bumper assembly and each include at least one reinforcing rib cast integral therewith.

Abstract: This disclosure relates generally to removing wire insulation. In an embodiment, a system for heating and removal of wire insulation includes a power supply configured to receive input power and to provide a high frequency power output to an induction coil. The induction coil is to be coupled to the power supply and dimensioned to receive an insulated wire therethrough. The induction coil is also to produce a field based upon the high frequency power output to heat the wire by induction and to condition insulation disposed on an outer surface of the wire for removal.

Abstract: Herein are disclosed fluorescent dyes based around a framework for a ligand comprising a pyridyl group linked to a diaryl anilido unit. A variety of ligands based on this framework are disclosed. The ligands chelate to a BF2 center to produce the fluorescent dye. The disclosed dyes combine longer Stokes shifts (approximately 100 nm) with increased quantum yields. They are also photostable in aqueous and organic solutions for several hours. These dyes may be used in the labeling of biomolecules for bioimaging and assays. Also disclosed are methods for the synthesis of these dyes.

Abstract: A data processing system includes a system memory, one or more processing cores, and a memory controller that controls access to a system memory. The memory controller includes a memory speculation mechanism that stores historical information regarding prior memory accesses. In response to a memory access request, the memory controller speculatively initiates access to the system memory based upon the historical information in the memory speculation mechanism in advance of receipt of a coherency message indicating that the memory access request is to be serviced by reference to the system memory.

Abstract: Herein are disclosed fluorescent dyes based around a framework for a ligand comprising a pyridyl group linked to a diaryl anilido unit. A variety of ligands based on this framework are disclosed. The ligands chelate to a BF2 center to produce the fluorescent dye. The disclosed dyes combine longer Stokes shifts (approximately 100 nm) with increased quantum yields. They are also photostable in aqueous and organic solutions for several hours. These dyes may be used in the labeling of biomolecules for bioimaging and assays. Also disclosed are methods for the synthesis of these dyes.

Abstract: A method, a system, and computer readable medium comprising instructions for optimizing on-premise conferencing are provided. The method comprises receiving at least one call from at least one caller, identifying at least one call from at least one caller, and connecting the at least one call to a conference call bridge via a single connection.

Abstract: A computer memory, having one or more of a semiconductor memory device having an internal memory array comprising a plurality of semiconductor dynamic random access memory (DRAM) cells arranged in a matrix of rows and columns, and provided as a memory module rank of such memory devices arranged in an array on a DIMM of one or more of said semiconductor memory device on a substrate which can be coupled via a memory device data interface to a memory system as a memory subsystem, each of said memory device having a low power shut-down state that can be activated using a common memory data interface. Control of power to a DRAM issues over the data interface two commands to a DRAM power control command decode, a power-state program signal and a power-state reset signal as a power-state control commands to control the power state of said DRAM, and to activate for READ/WRITE a memory cell as a normal active or spare device.

Abstract: This disclosure relates generally to removing wire insulation. In an embodiment, a system for heating and removal of wire insulation includes a power supply configured to receive input power and to provide a high frequency power output to an induction coil. The induction coil is to be coupled to the power supply and dimensioned to receive an insulated wire therethrough. The induction coil is also to produce a field based upon the high frequency power output to heat the wire by induction and to condition insulation disposed on an outer surface of the wire for removal.

Abstract: A method, a system, and computer readable medium comprising instructions for optimizing on-premise conferencing are provided. The method comprises receiving at least one call from at least one caller, identifying at least one on-premise call from at least one caller on the premise, collecting the at least one on-premise call from the at least one call, and connecting the at least one on-premise call to a conference call bridge via a single connection.

Abstract: A system to improve error control coding. An example system includes memory chips of at least two different kinds. The system also includes error control encoder circuitry to substantially encode data for storage in any memory rank. The system further includes error control decoder circuitry to substantially decode encoded data received from any memory rank. The error decoder circuitry is comprised of a slow decoder and a fast decoder.

Abstract: A method and system for enabling directed temperature/power management at the DIMM-level and/or DRAM-level utilizing intelligent scheduling of memory access operations received at the memory controller. Hot spots within the memory subsystem, caused by operating the DIMMs/DRAMs above predetermined/preset threshold power/temperature values for operating a DIMM and/or a DRAM, are avoided/controlled by logic within the memory controller. The memory controller logic throttles the number/frequency at which commands (read/write operations) are issued to the specific DIMM/DRAM based on stored parameter values and tracking of outstanding operations issued to the memory subsystem devices.

Abstract: A memory subsystem completes multiple read operations in parallel, utilizing the functionality of buffered memory modules in a daisy chain topology. A variable read latency is provided with each read command to enable memory modules to run independently in the memory subsystem. Busy periods of the memory device architecture are hidden by allowing data buses on multiple memory modules attached to the same data channel to run in parallel rather than in series and by issuing reads earlier than required to enable the memory devices to return from a busy state earlier. During scheduling of reads, the earliest received read whose target memory module is not busy is immediately issued at a next command cycle. The memory controller provides a delay parameter with each issued read. The number of cycles of delay is calculated to allow maximum utilization of the memory modules' data bus bandwidth without causing collisions on the memory channel.

Abstract: A method and system is presented for correcting a data error in a primary Dynamic Random Access Memory (DRAM) in a Dual In-line Memory Module (DIMM). Each DRAM has a left half (for storing bits 0:3) and a right half (for storing bits 4:7). A determination is made as to whether the data error was in the left or right half of the primary DRAM. The half of the primary DRAM in which the error occurred is removed from service. All subsequent reads and writes for data originally stored in the primary DRAM's defective half are made to a half of a spare DRAM in the DIMM, while the DRAM's non-defective half continues to be used for subsequently storing data.

Abstract: A system to improve error control coding may include memory chips of at least two different kinds. The system may also include error control encoder circuitry to substantially encode data for storage in any memory rank. The system may further include error control decoder circuitry to substantially decode encoded data received from any memory rank. The error decoder circuitry is comprised of a slow decoder and a fast decoder.