Patents by Inventor Warren L. Bean

Warren L. Bean has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Distributed processing memory chip with embedded logic having both data memory and broadcast memory
    Patent number: 5751987
    Abstract: Memory chips with data memory (202), embedded logic (206) and broadcast memory (204) for two modes of operation are disclosed. A first mode of operation is the usual memory mode expected of a data RAM. The second mode of operation allows localized computation and/or processing of the data in data memory (202) by the embedded logic (206) with minimal handshaking with a remote CPU. In a functioning system, the memory chips are organized in a hierarchical manner and include address-associative memory systems.
    Type: Grant
    Filed: May 4, 1995
    Date of Patent: May 12, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Shivaling S. Mahant-Shetti, Derek J. Smith, Basavaraj I. Pawate, George R. Doddington, Warren L. Bean, Mark G. Harward, Thomas J. Aton
  • Devices, systems and methods for implementing a Kanerva memory
    Patent number: 5390139
    Abstract: A memory system 10 is provided including a processor 12 and an active memory device 14 coupled to a processor 12. Active memory 14 includes a first memory 20 for storing a plurality of possible addresses and a second memory 22 for storing an actual address received from processor 12. Circuitry 26 is provided for identifying at least one active address from ones of the possible addresses stored in first memory 20 as a function of the actual address stored in second memory 22.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: February 14, 1995
    Assignee: Texas Instruments Incorporated
    Inventors: Derek Smith, Shivaling Mahant-Shetti, Basavaraj Pawate, George R. Doddington, Warren L. Bean