Patents by Inventor Wasako Fueda

Wasako Fueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Input/output control apparatus managing cache memory utilizing a spare hash table for operations if first hash table enters a synonym state
    Patent number: 6237046
    Abstract: When an input/output request of a channel adapter causes a mishit on a cache and a staging amount by a device adapter reaches a predetermined amount, the cache is set into a hit status and the channel adapter is reactivated. By receiving a hit response, the reactivated channel adapter executes an input and an output for the cache and the staging of the channel adapter in parallel. A defective/alternating track management table which corresponds to track data stored in a cache memory and has each of addresses of a defective track and an alternating track and flag information showing a link state between both of the defective track and the alternating track is provided for an input/output controller. For a retrieving request in which the defective track address is designated, the defective/alternating track management table is retrieved and the corresponding alternating track address is obtained, thereby judging the presence or absence of a registration of a hash table.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: May 22, 2001
    Assignee: Fujitsu Limited
    Inventors: Hideaki Ohmura, Kazuma Takatsu, Wasako Fueda
  • Input/output control apparatus and method for transfering track data from cache module to channel unit during the staging of the data track from device adapter
    Patent number: 5761531
    Abstract: When an input/output request of a channel adapter causes a mishit on a cache and a staging amount by a device adapter reaches a predetermined amount, the cache is set into a hit status and the channel adapter is reactivated. By receiving a hit response, the reactivated channel adapter executes an input and an output for the cache and the staging of the channel adapter in parallel. A defective/alternating track management table which corresponds to track data stored in a cache memory and has each of addresses of a defective track and an alternating track and flag information showing a link state between both of the defective track and the alternating track is provided for an input/output controller. For a retrieving request in which the defective track address is designated, the defective/alternating track management table is retrieved and the corresponding alternating track address is obtained, thereby judging the presence or absence of a registration of a hash table.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: June 2, 1998
    Assignee: Fujitsu Limited
    Inventors: Hideaki Ohmura, Kazuma Takatsu, Wasako Fueda