Abstract: A system, method, and computer-usable medium for applying a destructive firmware update in a non-destructive manner. According to a preferred embodiment of the present invention, during operation of a multiprocessor data processing system, a service processor updates firmware in the multiprocessor data processing system from a first firmware setting to a second firmware setting. The service processor iteratively applies the second firmware setting to hardware within the multiprocessor data processing system by de-allocating a first hardware device when the second firmware setting includes at least one destructive operation targeted to the first hardware device, performing the destructive operation on the first hardware device, and re-allocating the first hardware device into the multiprocessor data processing system when the destructive operation is complete.

Abstract: A system, method, and computer-usable medium for applying a destructive firmware update in a non-destructive manner. According to a preferred embodiment of the present invention, during operation of a multiprocessor data processing system, a service processor updates firmware in the multiprocessor data processing system from a first firmware setting to a second firmware setting. The service processor iteratively applies the second firmware setting to hardware within the multiprocessor data processing system by de-allocating a first hardware device when the second firmware setting includes at least one destructive operation targeted to the first hardware device, performing the destructive operation on the first hardware device, and re-allocating the first hardware device into the multiprocessor data processing system when the destructive operation is complete.

Abstract: In a first aspect, a first method is provided for testing an integrated circuit (IC). The first method includes the steps of (1) employing one of a plurality of input lines to receive a test signal for a processor; (2) employing one of a plurality of output lines to send a test result from the processor; and (3) if the test result is unsuccessful, performing at least one of employing a remaining one of the plurality of input lines to receive the test signal for the processor and employing a remaining one of the plurality of output lines to send the test result from the processor. Numerous other aspects are provided.

Abstract: A system and method for fast system recovery that bypasses diagnostic routines by disconnecting failed hardware from the system before rebooting. Failed hardware and hardware that will be affected by removal of the failed hardware of the system are disconnected from the system. The system is restarted, and because the failed hardware is disconnected, diagnostic routines may safely be eliminated from the reboot process.

Abstract: In a first aspect, a first method is provided for testing an integrated circuit (IC). The first method includes the steps of (1) employing one of a plurality of input lines to receive a test signal for a processor; (2) employing one of a plurality of output lines to send a test result from the processor; and (3) if the test result is unsuccessful, performing at least one of employing a remaining one of the plurality of input lines to receive the test signal for the processor and employing a remaining one of the plurality of output lines to send the test result from the processor. Numerous other aspects are provided.

Abstract: A method, apparatus, and computer instructions in a data processing system for managing clocks. The functionality of clock sources in the data processing system is verified to identify a set of valid clock sources in response to beginning an initial load process. Hardware is initialized in the data processing system using a valid clock source from the set of valid clock sources.

Abstract: A method, system, and article of manufacture for automatically performing one or more diagnostic tests during a system boot process are provided. The tests may be performed after a specific period or periods of time associated with the tests have passed since the tests were last performed. Such periodic diagnostic tests may allow faulty chips or other problems within the system to be detected before the occurrence of full system failures that could cause unacceptable downtime.

Abstract: An electronics systems having variable interconnections among major components is tested by dynamically identifying the locations and types of all system components at the time the test is to be performed, for building a global model describing the interconnections among these components. Specific tests appropriate for this model are then dynamically generated and executed. Data on the components themselves identifies them. The tests employ boundary-scanning techniques to locate failing drivers, receivers, and bidirectional driver/receivers, as well as open and shorted interconnections.