Abstract: A pulse peak detector for producing a D.C. voltage level corresponding to the peak amplitude of an input signal. A differential comparator is utilized to compare the input signal to the output level, and to activate a control circuit when the peak amplitude of such input signal exceeds the output voltage. The control circuit includes a current source which operates for a predetermined resettable time interval to provide a charging current path for a storage capacitor. An emitter follower is disposed between the storage capacitor and the system output to isolate the capacitor from any output loading. For short-duration repetitive input pulses, for example, 10 nanoseconds or less, a latch circuit insures activation of the timing circuit.