Abstract: A method and apparatus for coordinating dynamic memory page deallocation with a redundant bit line steering mechanism are provided. With the method and apparatus, memory scrubbing and redundant bit line steering operations are performed in parallel with handling of notifications of runtime correctable errors. When a correctable error is encountered during runtime, and the correctable error is determined to be persistent, then dynamic memory page deallocation is requested of a hypervisor. The determination of persistence is based on a history CE table that is populated by the operation of the memory scrubbing and redundant bit line steering mechanism of a service processor. Thus, only those correctable errors that persist for longer than one memory scrubbing cycle are subject to memory page deallocation.

Abstract: Customized instructions for installation of a device having multiple variable components is described, and are generated by an instruction generator program. A device description file lists a desired set of components for the device. Each of the components is broken down into one or more installation tasks, and the tasks are sequenced in a desired order for installation of the device. Text and graphic modules for inclusion in the instructions are varied based on the physical characteristics of the components, and their interconnection. Scaled line drawings are also generated based on information about each component and its placement in the device.