Abstract: A controller for controlling an access of a non-volatile memory having an error-correcting code area and a data area is provided. The controller includes an error-correcting module and a first inverting circuit electrically connected to the error-correcting module for inverting data and error-correcting codes corresponding to the data. When the controller both writes all 0xFF data in the data area and writes all 0xFF error-correcting codes in the error-correcting code area, the first inverting circuit inverts the all 0xFF data and the all 0xFF error-correcting codes into all 0x00 data and all 0x00 error-correcting codes, respectively.

Abstract: A flash storage chip including a single circuit board, a microcontroller, a flash memory, and a peripheral component interconnect express (PCI Express) connecting interface is provided. The microcontroller, the flash memory, and the PCI Express connecting interface are embedded on the single circuit board, and the microcontroller has a flash memory interface and a PCI Express interface. When a host writes a data into the flash storage chip, the microcontroller receives the data though the PCI Express interface and stores the data into the flash memory though the flash memory interface. When the host reads a data form the flash storage chip, the microcontroller reads the data from the flash memory though the flash memory interface and transmits the data to the host though the PCI Express interface and the PCI Express connecting interface.

Abstract: A virtual universal serial bus (USB) flash memory storage device with a peripheral component interconnect (PCI) Express interface including a microcontroller connected separately to a flash memory and a PCI Express connecting interface, and the microcontroller has a flash memory interface, a PCI Express interface and a virtual USB module and the virtual USB module includes a USB host and a USB device. If a host gives a USB instruction for saving or reading to the storage device, the USB instruction will be sent to and executed by the virtual USB module and the required data processing for saving or reading will be completed through the flash memory interface and the flash memory. The data in the storage device can be transmitted with a PCI Express standard transmission rate, and the host considers the storage device as a USB device instead of a pure PCI Express device.

Abstract: A method for managing blocks is provided. In the method, a plurality of flash memories is divided into a plurality of block program units, and blocks mapped to each of the block program units are recorded, wherein each of the block program units maps to at least two blocks. Next, available states of the block program units are respectively determined according to good or bad states of the mapped blocks. Final, good blocks within the block program units are recorded, so as to provide the good blocks within the block program units according to the record for being written with data. Accordingly, it is possible to fully utilize the blocks in the flash memories.

Abstract: The present invention discloses a virtual integrated drive electronics (IDE) card reader with a peripheral component interconnect express (PCI Express). The card reader includes a microcontroller connected to a PCI Express connecting interface and a memory card connecting interface separately. The microcontroller includes a memory card interface, a PCI Express interface, and a virtual IDE module. The virtual IDE module includes a IDE host and a IDE device. If the host sends an instruction for storing or reading data to a memory card connected to the card reader, the instruction will be sent to and executed in the virtual IDE module. The data in the memory card can be transmitted at a transmission rate up to the standard of an IDE device, and the host will consider the card reader as an IDE device instead of a PCI Express device only.

Abstract: A flash memory information read/write method in which an external resource such as host, external memory, EEPROM, or external controller is used to read and update new flash memory information after fabrication of a flash memory device, enabling the new flash memory information to be written in a predetermined address in a flash memory module of the flash device by a controller of the flash memory device, so that every flash memory device that has an erroneous or damaged factory data or information is still usable, and the flash memory controller provider needs not to continuously develop new firmware controllers for different flash memories.

Abstract: The present invention discloses a virtual universal serial bus (USB) card reader with a peripheral component interconnect (PCI) Express interface. The card reader includes a microcontroller connected to a PCI Express connecting interface and a memory card connecting interface separately. The microcontroller includes a memory card interface, a PCI Express interface and a virtual USB module. The virtual USB module includes a USB host and a USB device. If a host gives an instruction to a memory card connected to the card reader for storing or reading data, the instruction will be sent to and executed by the virtual USB module. The data in the memory card can be transmitted at a transmission rate up to the USB standard, and the host will consider the card reader as a USB device instead of simply a PCI Express device.

Abstract: The present invention discloses a virtual integrated drive electronics (IDE) storage device with a peripheral component interconnect (PCI) Express interface. The storage device includes a microcontroller connected to a PCI Express connecting interface and a flash memory separately. The microcontroller includes a flash memory interface, a PCI Express interface and a virtual IDE module. The virtual IDE module includes an IDE host and an IDE device. When the host sends an instruction for storing or reading data to a flash memory, the instruction will be sent to and executed in the virtual IDE module. The data in the flash memory can be transmitted at a transmission rate up to the standard of an IDE device, and the host will consider the storage device as an IDE device instead of a PCI Express device only.

Abstract: A flash storage chip including a single circuit board, a microcontroller, a flash memory, and a peripheral component interconnect express (PCI Express) connecting interface is provided. The microcontroller, the flash memory, and the PCI Express connecting interface are embedded on the single circuit board, and the microcontroller has a flash memory interface and a PCI Express interface. When a host writes a data into the flash storage chip, the microcontroller receives the data though the PCI Express interface and stores the data into the flash memory though the flash memory interface. When the host reads a data form the flash storage chip, the microcontroller reads the data from the flash memory though the flash memory interface and transmits the data to the host though the PCI Express interface and the PCI Express connecting interface.

Abstract: The present invention describes a modulator including a differential amplifier connected to a reference voltage and a first transistor, and the first transistor is connected to a feedback device, and a second transistor is set between the first transistor and the differential amplifier and connected to a voltage detector and a diode, and the diode is connected to a power supply, and the voltage detector keeps on detecting an output voltage (VOUT) between the feedback device and the first transistor. If the output voltage (VOUT) value is lower than a predetermined voltage value of the power supply, the voltage detector will issue a signal to drive the second transistor and limit a gate-source voltage (VGS) of the first transistor within a voltage difference of the diode, so as to reduce the impetus of the first transistor and avoid the phenomenon of a sudden climb with an excessively large output voltage (VOUT).

Abstract: The present invention discloses a virtual universal serial bus (USB) card reader with a peripheral component interconnect (PCI) Express interface. The card reader includes a microcontroller connected to a PCI Express connecting interface and a memory card connecting interface separately. The microcontroller includes a memory card interface, a PCI Express interface and a virtual USB module. The virtual USB module includes a USB host and a USB device. If a host gives an instruction to a memory card connected to the card reader for storing or reading data, the instruction will be sent to and executed by the virtual USB module. The data in the memory card can be transmitted at a transmission rate up to the USB standard, and the host will consider the card reader as a USB device instead of simply a PCI Express device.

Abstract: A controller for controlling an access of a non-volatile memory having an error-correcting code area and a data area is provided. The controller includes an error-correcting module and a first inverting circuit electrically connected to the error-correcting module for inverting data and error-correcting codes corresponding to the data. When the controller both writes all 0×FF data in the data area and writes all 0×FF error-correcting codes in the error-correcting code area, the first inverting circuit inverts the all 0×FF data and the all 0×FF error-correcting codes into all 0×00 data and all 0×00 error-correcting codes, respectively.

Abstract: A detect/modulate circuit comprises a plurality of modulate resistors connected to a main resistor of a bandgap in series, and each module resistor is connected to a transistor switch in parallel, and each transistor switch is connected to a logic controller, and the logic controller is connected in sequence to a plurality of detect circuits and fuses corresponding to the quantity of the transistor switches. When the detect circuit receives a low-to-high power-on reset signal to detect whether or not the fuse is fused, the detect circuit will issue a voltage level signal “0” for the fuse being not fused or a voltage level signal “1” for the fuse being fused to the logic controller. The logic controller converts the received voltage level signal according to a logic conversion table to control the electric connection of the corresponding transistor switch, so as to fine turn the main resistance of the bandgap.

Abstract: A virtual universal serial bus (USB) flash memory storage device with a peripheral component interconnect (PCI) Express interface including a microcontroller connected separately to a flash memory and a PCI Express connecting interface, and the microcontroller has a flash memory interface, a PCI Express interface and a virtual USB module and the virtual USB module includes a USB host and a USB device. If a host gives a USB instruction for saving or reading to the storage device, the USB instruction will be sent to and executed by the virtual USB module and the required data processing for saving or reading will be completed through the flash memory interface and the flash memory. The data in the storage device can be transmitted with a PCI Express standard transmission rate, and the host considers the storage device as a USB device instead of a pure PCI Express device.

Abstract: The present invention discloses a virtual integrated drive electronics (IDE) storage device with a peripheral component interconnect (PCI) Express interface. The storage device includes a microcontroller connected to a PCI Express connecting interface and a flash memory separately. The microcontroller includes a flash memory interface, a PCI Express interface and a virtual IDE module. The virtual IDE module includes an IDE host and an IDE device. When the host sends an instruction for storing or reading data to a flash memory, the instruction will be sent to and executed in the virtual IDE module. The data in the flash memory can be transmitted at a transmission rate up to the standard of an IDE device, and the host will consider the storage device as an IDE device instead of a PCI Express device only.

Abstract: A converting circuit, for preventing wrong error correction code from occurring due to an error correction rule during data reading operation is provided. When the flash memory controller writes all 0xFF data into the flash memory, the byte error correction rule generates a set of correct error correction codes and the error correction code converting circuit converts the set of correct error correction codes into 0xFF error correction codes, and values stored in the data area and error correction code area of the flash memory are converted into 0xFF to prevent wrong error correction code from occurring during data reading operation when the error correction codes are not completely 0xFF.

Abstract: The present invention discloses a virtual integrated drive electronics (IDE) storage device with a peripheral component interconnect (PCI) Express interface. The storage device includes a microcontroller connected to a PCI Express connecting interface and a flash memory separately. The microcontroller includes a flash memory interface, a PCI Express interface and a virtual IDE module. The virtual IDE module includes an IDE host and an IDE device. When the host sends an instruction for storing or reading data to a flash memory, the instruction will be sent to and executed in the virtual IDE module. The data in the flash memory can be transmitted at a transmission rate up to the standard of an IDE device, and the host will consider the storage device as an IDE device instead of a PCI Express device only.

Abstract: The present invention discloses a virtual universal serial bus (USB) card reader with a peripheral component interconnect (PCI) Express interface. The card reader includes a microcontroller connected to a PCI Express connecting interface and a memory card connecting interface separately. The microcontroller includes a memory card interface, a PCI Express interface and a virtual USB module. The virtual USB module includes a USB host and a USB device. If a host gives an instruction to a memory card connected to the card reader for storing or reading data, the instruction will be sent to and executed by the virtual USB module. The data in the memory card can be transmitted at a transmission rate up to the USB standard, and the host will consider the card reader as a USB device instead of simply a PCI Express device.

Abstract: A virtual universal serial bus (USB) flash memory storage device with a peripheral component interconnect (PCI) Express including a microcontroller connected separately to a flash memory and PCI Express connecting interface, and the microcontroller has a flash memory interface, a PCI Express interface and a virtual USB module and the virtual USB module includes a USB host and a USB device. If a host gives a USB instruction for saving or reading to the storage device, the USB instruction will be sent to and executed by the virtual USB module and the required data processing for saving or reading will be completed through the flash memory interface and the flash memory. The data in the storage device can be transmitted with a PCI Express standard transmission rate, and the host considers the storage device as a USB device instead of a pure PCI Express device.

Abstract: A detect/modulate circuit comprises a plurality of modulate resistors connected to a main resistor of a bandgap in series, and each module resistor is connected to a transistor switch in parallel, and each transistor switch is connected to a logic controller, and the logic controller is connected in sequence to a plurality of detect circuits and fuses corresponding to the quantity of the transistor switches. When the detect circuit receives a low-to-high power-on reset signal to detect whether or not the fuse is fused, the detect circuit will issue a voltage level signal “0” for the fuse being not fused or a voltage level signal “1” for the fuse being fused to the logic controller. The logic controller converts the received voltage level signal according to a logic conversion table to control the electric connection of the corresponding transistor switch, so as to fine turn the main resistance of the bandgap.