Patents by Inventor Wei Chang

Wei Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240149494
    Abstract: A method for silicon carbide ingot peeling includes the steps of: placing the silicon carbide ingot between first and second suckers; having a pressing head disposed on a top surface of the first sucker to apply mechanical oscillatory energy to both the silicon carbide ingot and the second sucker through the first sucker; and, having an elastic element disposed under the second sucker to absorb part of the mechanical oscillatory energy to transmit longitudinal waves thereof to a modified layer of the silicon carbide ingot for propagating individually intermittent invisible cracks at the modified layer to break silicon carbide chains at different levels. Till the cracks connect together for forming a continuous crack across the silicon carbide ingot, a top portion of the silicon carbide ingot is then separable therefrom to form a wafer. In addition, an apparatus for silicon carbide ingot peeling is also provided.
    Type: Application
    Filed: February 13, 2023
    Publication date: May 9, 2024
    Inventors: WENG-JUNG LU, YING-FANG CHANG, PIN-YAO LEE, YI-WEI LIN
  • Publication number: 20240155082
    Abstract: A body-worn camera and an operation method thereof are provided, and the body-worn camera a central processing unit, a video recording module, a turntable, and a main button. The video recording module is electrically connected to the central processing unit. The turntable is electrically connected to the central processing unit. The main button is electrically connected to the central processing unit. After the video recording module completes recording a video, when the central processing unit receives a category mode signal from the turntable and receives a category name confirmation signal from the main button, the central processing unit executes a video tagging program, and the video tagging program saves a corresponding relationship between a category name and the video.
    Type: Application
    Filed: July 11, 2023
    Publication date: May 9, 2024
    Inventors: HSIEN-YANG CHIANG, TA-WEI CHANG, CHENG-LIANG HUANG, YEH-SHENG CHEN
  • Publication number: 20240153440
    Abstract: An interleaving driving method of light emitting diode array comprises: receiving image signal; converting the image signal into gray scale signals, the gray scale signals correspond to the plurality of light emitting channels, respectively, to execute multiple steps. The multiple steps include: generating a high gray scale data group and a low gray scale data group; when there is data in the high gray scale data group, drive the light emitting diode channel corresponding to the target gray scale signal during a first turn on time interval; when there is data in the low gray scale data group, drive the light emitting diode channel corresponding to the target gray scale signal during a second turn on time interval which does not overlap the first turn on time interval and a first gray scale signal and a second gray scale signal of the gray scale signals does not overlap each other.
    Type: Application
    Filed: March 9, 2023
    Publication date: May 9, 2024
    Applicant: MACROBLOCK,INC.
    Inventors: Kai En LIN, Che Wei CHANG, Ming Jia WU
  • Publication number: 20240153719
    Abstract: An operation-indication mode switching structure, a circuit, and a method for operating the same are provided. The operation-indication mode switching structure is disposed on a housing of a device, and includes a switching mechanism that is used to switch multiple operation-indication modes. The switching mechanism is selectively connected with one of multiple signal terminals. When the switching mechanism is manipulated to switch to one of the operation-indication modes, a control unit of the device receives an operation-indication mode switching signal generated by the switching mechanism conducting or circuit-shorting one of the multiple signal terminals. A corresponding operation-indication mode that is a covert mode, a stealth mode, or a normal mode can be determined. The control unit is used to control an indication function of the device according to the operation-indication mode that is switched to.
    Type: Application
    Filed: July 18, 2023
    Publication date: May 9, 2024
    Inventors: HSIEN-YANG CHIANG, TA-WEI CHANG, CHENG-LIANG HUANG, YEH-SHENG CHEN
  • Publication number: 20240152033
    Abstract: An optical system is provided, including a movable part, a fixed part, and a driving assembly. The movable part is connected to a first optical element. The movable part is movable relative to the fixed part. The fixed part has a fixed part opening, wherein a light passes through the fixed part opening. The driving assembly drives the movable part to move relative to the fixed part. The first optical element at least partially overlaps the fixed part opening when the movable part is in a first position. When the movable part is in an extreme position, the first optical element does not overlap the fixed part opening.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: Chen-Hung CHAO, Po-Xiang ZHUANG, Chao-Chang HU, Yi-Ho CHEN, Wei-Jhe SHEN
  • Publication number: 20240152035
    Abstract: An optical system is provided, including a fixed part, a movable part, and a driving assembly. The fixed part has an opening. A light passes through the opening. The movable part is movable relative to the fixed part and connected to a first optical element. The driving assembly drives the movable part to move relative to the fixed part. The first optical element at least partially overlaps the opening when the movable part is in a first position. The first optical element further includes a first optical element surface, and the first optical element surface faces the light.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: Chen-Hung CHAO, Po-Xiang ZHUANG, Chao-Chang HU, Yi-Ho CHEN, Wei-Jhe SHEN
  • Publication number: 20240153887
    Abstract: A semiconductor package structure includes a base having a first surface and a second surface opposite thereto, wherein the base comprises a wiring structure, a first electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, a second electronic component disposed over the first surface of the base and electrically coupled to the wiring structure, wherein the first electronic component and the second electronic component are separated by a molding material, a first hole and a second hole formed on the second surface of the base, and a frame disposed over the first surface of the base, wherein the frame surrounds the first electronic component and the second electronic component.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 9, 2024
    Inventors: Tzu-Hung LIN, Chia-Cheng CHANG, I-Hsuan PENG, Nai-Wei LIU
  • Publication number: 20240154021
    Abstract: A p-GaN high-electron-mobility transistor (HEMT) includes a buffer layer stacked on a substrate, a channel layer stacked on the buffer layer, a supply layer stacked on the channel layer, a doped layer stacked on the supply layer, and a hydrogen barrier layer covering the supply layer and the doped layer. A source and a drain are electrically connected to the channel layer and the supply layer, respectively. A gate is located on the doped layer. The hydrogen barrier layer is doped with fluorine.
    Type: Application
    Filed: December 29, 2022
    Publication date: May 9, 2024
    Inventors: TING-CHANG CHANG, Wei-Chen Huang, Shih-Kai Lin, Yong-Ci Zhang, Sheng-Yao Chou, Chung-Wei Wu, Po-Hsun Chen
  • Patent number: 11978715
    Abstract: A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate and forming a first adhesive element directly on the chip structure. The first adhesive element has a first thermal conductivity. The method also includes forming a second adhesive element directly on the chip structure. The second adhesive element has a second thermal conductivity, and the second thermal conductivity is greater than the first thermal conductivity. The method further includes attaching a protective lid to the chip structure through the first adhesive element and the second adhesive element.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Tsung Kuo, Hui-Chang Yu, Chih-Kung Huang, Wei-Teng Chang
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Patent number: 11978511
    Abstract: A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Huei Lee, Chun-Wei Chang, Jian-Hong Lin, Wen-Hsien Kuo, Pei-Chun Liao, Chih-Hung Nien
  • Patent number: 11978497
    Abstract: Disclosed is a DDR SDRAM signal calibration device capable of adapting to the variation of voltage and/or temperature. The device includes: an enablement signal setting circuit configured to generate data strobe (DQS) enablement setting; a signal gating circuit configured to generate a DQS enablement setting signal and a DQS enablement signal according to the DQS enablement setting and then output a gated DQS signal according to the DQS enablement signal and a DQS signal; and a calibration circuit configured to generate a first delay signal according to the DQS enablement setting signal and generate a second delay signal according to the first delay signal, the calibration circuit further configured to generate a calibration signal according to the first and second delay signals and the DQS signal. The enablement signal setting circuit maintains or adjusts the DQS enablement setting according to the calibration signal.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: May 7, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuo-Wei Chi, Chun-Chi Yu, Chih-Wei Chang, Ger-Chih Chou
  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Publication number: 20240142175
    Abstract: Disclosed are an unblocking apparatus for a furnace discharging pipe and a use method. The unblocking apparatus includes a rail, a rail car that may move along the rail, an unblocking drive mechanism arranged on the rail car, a heat-unblocking component, a cold-unblocking component, and a material receiving component that is used to receive a blocking material in the discharging pipe, and a drive end of the unblocking drive mechanism is detachably connected with one end of the heat-unblocking component and the cold-unblocking component respectively. The present application effectively handles different blockage situations of the furnace discharging pipe by connecting the unblocking drive mechanism with an unblocking rod capable of heat-unblocking and a drilling rod capable of cold-unblocking, thereby two modes of heat-unblocking and cold-unblocking are performed on the furnace discharging pipe; and the discharging pipe may be unblocked by a remote operation.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Applicants: China Nuclear Sichuan Environmental Protection Engineering Co., Ltd., China Building Materials Academy, China Nuclear Power Engineering Co., Ltd.
    Inventors: Weidong XU, Yu CHANG, Yongchang ZHU, Hong DUAN, Chunyu TIAN, Wei WU, Debo YANG, Qingbin ZHAO, Shuaizhen WU, Lin WANG, Zhu CUI, Heyi GUO, Maosong FAN, Yuancheng SUN, Jie MEI, Xiaoli AN, Yongxiang ZHAO, Qinda LIU
  • Publication number: 20240141916
    Abstract: A ceiling fan and a structure thereof are provided. The structure includes a blade holder, a plurality of blades, and a plurality of positioning elements. The blade holder includes a holder body and a plurality of support platforms. The holder body has a plurality of first matching structures spaced apart from each other. Each of the support platforms includes a first positioning structure. Each of the blades has a second matching structure and a second positioning structure. The second matching structures can be guided by the first matching structures, so that each of the blades is disposed at an installation position on one of the support platforms along an oblique track. When each of the blades is located at the installation position, the first positioning structures and the second positioning structures abut against each other.
    Type: Application
    Filed: May 23, 2023
    Publication date: May 2, 2024
    Inventors: WEN-HAI HUANG, CHIA-WEI CHANG, MIN-YUAN HSIAO
  • Publication number: 20240143888
    Abstract: An integrated circuit includes a first and second active region, a first insulating region, and a first and second contact. The first and second active region extend in a first direction, and are on a first level. The first active region includes a first and second drain/source region. The second active region includes a third drain/source region. The first insulating region is over the first drain/source region. The first contact overlaps the third drain/source region, is electrically coupled to the third drain/source region and is located on a second level. The second contact includes a first and second portion. The first portion overlaps the first and second drain/source. The second portion overlaps the first contact, the first and third drain/source region, and the first insulating region, and is electrically coupled to the first portion, and electrically insulated from the first drain/source region.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Pochun WANG, Yu-Jung CHANG, Hui-Zhong ZHUANG, Ting-Wei CHIANG
  • Publication number: 20240146091
    Abstract: A vehicle power management system and a power management method thereof are provided. The power management method includes: determining, by a microcontroller, whether or not a voltage of an ignition-off signal is less than a voltage threshold when the microcontroller receives the ignition-off signal; stopping a vehicle power supply from charging a backup battery, and using the vehicle power supply to charge a back-end load; activating a counter of the microcontroller; stopping the vehicle power supply from charging the back-end load, and using the backup battery to charge the back-end load when a counting time of the counter reaches a first time threshold; sending, by the microcontroller, the ignition-off signal to the back-end load when the counting time of the counter reaches a second time threshold; and stopping the backup battery from charging the back-end load when the counting time of the counter reaches a third time threshold.
    Type: Application
    Filed: April 17, 2023
    Publication date: May 2, 2024
    Inventors: MING-ZONG WU, CHUN-KAI CHANG, LI-WEI CHENG
  • Publication number: 20240142270
    Abstract: A dynamic calibration method for heterogeneous sensors includes: sensing dynamic objects by a first sensor to generate first sensing data; sensing the dynamic objects by a second sensor to generate second sensing data; performing feature matching between the first sensing data and the second sensing data to determine first valid data and second valid data, and identifying a tracked object from the dynamic objects based on the first valid data and the second valid data; performing feature comparison between the first valid data and the second valid data corresponding to the tracked object to calculate data errors between the first sensor and the second sensor; and calculating a calibration parameter based on the first valid data and the second valid data when the number of the data errors exceeds an error threshold, and adjusting the first sensing data and the second sensing data based on the calibration parameter.
    Type: Application
    Filed: January 12, 2023
    Publication date: May 2, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Po-Wei Chen, Chi-Hung Wang, Che-Jui Chang
  • Publication number: 20240147711
    Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: PERNG-FEI YUH, YIH WANG, MENG-SHENG CHANG, JUI-CHE TSAI, KU-FENG LIN, YU-WEI LIN, KEH-JENG CHANG, CHANSYUN DAVID YANG, SHAO-TING WU, SHAO-YU CHOU, PHILEX MING-YAN FAN, YOSHITAKA YAMAUCHI, TZU-HSIEN YANG
  • Publication number: 20240143141
    Abstract: The present disclosure generally relates to underwater user interfaces.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: Benjamin W. BYLENOK, Alan AN, Richard J. BLANCO, Andrew CHEN, Maxime CHEVRETON, Kyle B. CRUZ, Walton FONG, Ki Myung LEE, Sung Chang LEE, Cheng-I LIN, Kenneth H. MAHAN, Anya PRASITTHIPAYONG, Alyssa RAMDYAL, Eric SHI, Xuefeng WANG, Wei Guang WU