Patents by Inventor Wei-Cheng LOU

Wei-Cheng LOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9665136
    Abstract: A cover for an electronic device includes a transparent portion and a non-transparent portion beside the transparent portion. The transparent portion defines a display area of the electronic device. The non-transparent portion defines a non-display area of the electronic device beside the display area. The non-transparent portion includes a transparent substrate integrated with the transparent portion. A plurality of through holes are defined on the transparent substrate.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: May 30, 2017
    Assignees: INTERFACE OPTOELECTRONIC (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chien-Chih Lu, Juin-Ming Wu, Wei-Cheng Lou
  • Patent number: 9658656
    Abstract: A cover for an electronic device includes a main portion and a border portion beside the main portion. The border portion includes a transparent substrate and a adhesive layer. The transparent substrate defines at least one through hole. The adhesive layer is adhered to an inner wall of the at least one through hole.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: May 23, 2017
    Assignees: INTERFACE OPTOELECTRONIC (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chien-Chih Lu, Juin-Ming Wu, Wei-Cheng Lou
  • Patent number: 9571910
    Abstract: An electronic device includes a speaker, and a cover covering the speaker. The cover includes a transparent main portion, and a non-transparent border portion. The non-transparent border portion includes a substrate integrated with the transparent main portion. The substrate of the border portion defines a plurality of through holes corresponding to the speaker to transmit sound output from the speaker.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: February 14, 2017
    Assignees: INTERFACE OPTOELECTRONIC (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chien-Chih Lu, Juin-Ming Wu, Wei-Cheng Lou
  • Publication number: 20150036845
    Abstract: An electronic device includes a speaker, and a cover covering the speaker. The cover includes a transparent main portion, and a non-transparent border portion. The non-transparent border portion includes a substrate integrated with the transparent main portion. The substrate of the border portion defines a plurality of through holes corresponding to the speaker to transmit sound output from the speaker.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 5, 2015
    Inventors: CHIEN-CHIH LU, JUIN-MING WU, WEI-CHENG LOU
  • Publication number: 20150036285
    Abstract: A cover for an electronic device includes a main portion and a border portion beside the main portion. The border portion includes a transparent substrate and a adhesive layer. The transparent substrate defines at least one through hole. The adhesive layer is adhered to an inner wall of the at least one through hole.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 5, 2015
    Inventors: CHIEN-CHIH LU, JUIN-MING WU, WEI-CHENG LOU
  • Publication number: 20150036286
    Abstract: A cover for an electronic device includes a transparent portion and a non-transparent portion beside the transparent portion. The transparent portion defines a display area of the electronic device. The non-transparent portion defines a non-display area of the electronic device beside the display area. The non-transparent portion includes a transparent substrate integrated with the transparent portion. A plurality of through holes are defined on the transparent substrate.
    Type: Application
    Filed: July 31, 2014
    Publication date: February 5, 2015
    Inventors: CHIEN-CHIH LU, JUIN-MING WU, WEI-CHENG LOU
  • Publication number: 20130122610
    Abstract: A die bonding apparatus and a die bonding method are provided, which are capable of simultaneously bonding a plurality of dies from a first placement area onto a substrate disposed on a second placement area. The die bonding apparatus includes a die sucking device which is movably located above the first placement area and a second placement area. The die sucking device includes a plurality of nozzles. The nozzles can suck the dies disposed on the first placement area, and then simultaneously bond the dies onto the substrate.
    Type: Application
    Filed: May 1, 2012
    Publication date: May 16, 2013
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Jun-Wei Chung, Wei-Cheng Lou, Jung-Kun Wu, Chung-I Chiang
  • Publication number: 20130105852
    Abstract: A package structure and a manufacturing method for the same are provided. The package structure includes a chip, a substrate and at least one adhesive layer. The chip has at least one electrode portion. The substrate has at least one circuit portion. The adhesive layer is disposed between the electrode portion and the circuit portion to form an electrical connection therebetween. The adhesive layer is a material, which comprises a metal compound, with a Negative Coefficient of Thermal Expansion (Negative CTE). Because of the material with a Negative CTE, the alignment shift can be avoided after the chip and the substrate are adhered together.
    Type: Application
    Filed: January 30, 2012
    Publication date: May 2, 2013
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Wei-Cheng LOU, Fong-Yee JAN, Chung-I CHIANG
  • Publication number: 20120318851
    Abstract: A chip bonding process includes the following steps. At least one chip is transferred onto a carrier, and a negative pressure environment is provided. Heat is provided to the at least one chip and/or the carrier, and a positive pressure is applied onto the at least one chip.
    Type: Application
    Filed: October 25, 2011
    Publication date: December 20, 2012
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Wei-Cheng LOU, Ming-Tang Chen, Ting-Yu Chou, Jung-Kun Wu, Chung-l Chiang
  • Publication number: 20120318850
    Abstract: A chip bonding apparatus includes a chamber, a chip transportation device, a heating device and a ventilation device. The chip transportation device is used for transferring at least one chip onto a carrier within the chamber. The chip transportation device is used for transferring at least one chip onto a carrier within the chamber. The heating device is used for providing heat to the at least one chip and/or the carrier within the chamber. The ventilation device communicates gas to flow through the chamber to form a negative pressure environment therein. The negative pressure environment is provided when the chip transportation device transfers at least one chip onto the carrier within the chamber, and a positive pressure is applied onto the at least one chip when the heating device provides heat to the at least one chip and/or the carrier.
    Type: Application
    Filed: October 25, 2011
    Publication date: December 20, 2012
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Wei-Cheng LOU, Ming-Tang Chen, Ting-Yu Chou, Jung-Kun Wu, Chung-I Chiang
  • Patent number: D745500
    Type: Grant
    Filed: January 25, 2014
    Date of Patent: December 15, 2015
    Assignees: INTERFACE OPTOELECTRONIC (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chien-Chih Lu, Juin-Ming Wu, Wei-Cheng Lou