Patents by Inventor Wei-Chieh Wang

Wei-Chieh Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996772
    Abstract: The present invention provides a voltage control method for controlling a power supply. The voltage control method comprises the following steps: obtaining a present output voltage value associated with a present gain value; obtaining a predetermined output voltage value associated with a predetermined duty ratio; calculating a target gain value, corresponding to the predetermined duty ratio, according to a gain value formula; performing a weight calculation on the present gain value and the target gain value for generating a buffer gain value; and setting an output voltage command according to the buffer gain value. Wherein the buffer gain value is between the present gain value and the target gain value.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: May 28, 2024
    Assignee: Chroma ATE Inc.
    Inventors: Szu-Chieh Su, Wei-Chin Tseng, Chih-Hsien Wang, His-Ping Tsai, Wen-Chih Chen, Guei-Cheng Hu
  • Patent number: 11996481
    Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Chih-Hao Wang, Kuo-Cheng Chiang, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu, Yu-Ming Lin, Chung-Wei Hsu
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Publication number: 20240154022
    Abstract: A method for manufacturing a semiconductor device includes forming a first fin structure and a second fin structure, wherein an isolation region is located between the fin structures, and wherein a space is located between the fin structures and above the isolation region; depositing a blocking layer over the first fin structure, the isolation region, and the second fin structure, wherein an upper portion of the blocking layer is located above the first fin structure and the second fin structure, and wherein a lower portion of the blocking layer fills the space located between the first fin structure and the second fin structure; removing the upper portion of the blocking layer; and while the lower portion of the blocking layer remains over the isolation region, performing an etch process to recess the first fin structure and the second fin structure.
    Type: Application
    Filed: February 7, 2023
    Publication date: May 9, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chieh Ho, Po-Cheng Wang, De-Fang Chen, Chao-Cheng Chen
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Publication number: 20240141922
    Abstract: A heat dissipation system of an electronic device including a body, a plurality of heat sources disposed in the body, and at least one centrifugal heat dissipation fan disposed in the body is provided. The centrifugal heat dissipation fan includes a housing and an impeller disposed in the housing on an axis. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions, and the plurality of outlets respectively correspond to the plurality of heat sources.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Patent number: 11960899
    Abstract: An information handling system includes multiple dual in-line memory modules (DIMMs) and a basic input/output system (BIOS). The DIMMs form a memory system of the information handling system. The BIOS begins a system boot of the information handling system, and performs a first memory reference code training. Based on the first memory reference code training, the BIOS discovers a bad DIMM of the DIMMs, and stores information associated with the bad DIMM. The BIOS reboots the information handling system. During the reboot, the BIOS retrieves the information associated with the bad DIMM. The BIOS disables a slot associated with the bad DIMM. In response to the slot being disabled, the BIOS performs a second memory reference code training. Based on the second memory reference code training, the BIOS downgrades the memory system to a closest possible DIMM population.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 16, 2024
    Assignee: Dell Products L.P.
    Inventors: Ching-Lung Chao, Hsin-Chieh Wang, Wei G. Liu, Yu-Hsuan Chou
  • Publication number: 20240096918
    Abstract: A device structure according to the present disclosure may include a first die having a first substrate and a first interconnect structure, a second die having a second substrate and a second interconnect structure, and a third die having a third interconnect structure and a third substrate. The first interconnect structure is bonded to the second substrate via a first plurality of bonding layers. The second interconnect structure is bonded to the third interconnect structure via a second plurality of bonding layers. The third substrate includes a plurality of photodiodes and a first transistor. The second die includes a second transistor having a source connected to a drain of the first transistor, a third transistor having a gate connected to drain of the first transistor and the source of the second transistor, and a fourth transistor having a drain connected to the source of the third transistor.
    Type: Application
    Filed: January 17, 2023
    Publication date: March 21, 2024
    Inventors: Hao-Lin Yang, Tzu-Jui Wang, Wei-Cheng Hsu, Cheng-Jong Wang, Dun-Nian Yuang, Kuan-Chieh Huang
  • Publication number: 20240079434
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 7, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
  • Patent number: 11921530
    Abstract: A power supply system includes an output terminal, a power supply control chip, a power supply switch and a detection device. The power supply control chip is configured to adjust the amount of an input power providing to an electronic device by the power supply device. The power supply switch is configured to control the connection between the power supply device and the power supply control chip. The detection device is configured to detect whether the power supply control chip operates normally. When the power supply control chip operates abnormally, the detection device controls the connection between the power supply device and the power supply control chip through the power supply switch for restarting the power supply control chip. The power supply control chip, the power supply switch and the detection device are disposed in an enclosed space.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: March 5, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shih-Chung Wang, Cheng-Yu Shu, Wei-Chieh Lin
  • Patent number: 11913472
    Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Chun-Chieh Wang, Shu-Hao Kuo
  • Patent number: 11916155
    Abstract: An optoelectronic package and a method for producing the optoelectronic package are provided. The optoelectronic package includes a carrier, a photonic device, a first encapsulant and a second encapsulant. The photonic device is disposed on the carrier. The first encapsulant covers the carrier and is disposed around the photonic device. The second encapsulant covers the first encapsulant and the photonic device. The first encapsulant has a topmost position and a bottommost position, and the topmost position is not higher than a surface of the photonic device.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: February 27, 2024
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chien-Hsiu Huang, Bo-Jhih Chen, Kuo-Ming Chiu, Meng-Sung Chou, Wei-Te Cheng, Kai-Chieh Liang, Yun-Ta Chen, Yu-Han Wang
  • Patent number: 10451659
    Abstract: A detection circuit of an electronic device includes a resistance detecting circuit and a voltage supplying circuit, wherein the detecting circuit is coupled to an input circuit which is coupled to the electronic device and comprises a plurality of resistors respectively coupled to a plurality of switches, wherein the resistance detecting circuit is arranged to detect whether the input circuit has a resistance variation and generate a detecting signal indicative of the resistance variation; and the voltage supplying circuit is coupled to the resistance detecting circuit to supply a first voltage signal, wherein the voltage supplying circuit receives the detecting signal, and selectively switches the first voltage signal to a second voltage signal according to the detecting signal; wherein the resistance detecting circuit determines whether at least one of the plurality of switches is closed according to the second voltage signal.
    Type: Grant
    Filed: September 24, 2018
    Date of Patent: October 22, 2019
    Assignee: Realtek Semiconductor Corp.
    Inventors: Cheng-Pin Chang, Tsung-Peng Chuang, Wei-Chieh Wang
  • Publication number: 20190094274
    Abstract: A detection circuit of an electronic device includes a resistance detecting circuit and a voltage supplying circuit, wherein the detecting circuit is coupled to an input circuit which is coupled to the electronic device and comprises a plurality of resistors respectively coupled to a plurality of switches, wherein the resistance detecting circuit is arranged to detect whether the input circuit has a resistance variation and generate a detecting signal indicative of the resistance variation; and the voltage supplying circuit is coupled to the resistance detecting circuit to supply a first voltage signal, wherein the voltage supplying circuit receives the detecting signal, and selectively switches the first voltage signal to a second voltage signal according to the detecting signal; wherein the resistance detecting circuit determines whether at least one of the plurality of switches is closed according to the second voltage signal.
    Type: Application
    Filed: September 24, 2018
    Publication date: March 28, 2019
    Inventors: Cheng-Pin Chang, Tsung-Peng Chuang, Wei-Chieh Wang
  • Patent number: 10095333
    Abstract: A touch apparatus including a first substrate, a first translucent electrode, a second substrate, an electrochromic layer, a reflective film, and a touch sensing structure is provided. The first substrate has a first inner surface and a first outer surface opposite to each other. The first translucent electrode is disposed on the first inner surface. The second substrate is disposed opposite to the first substrate. The electrochromic layer is located between the first inner surface of the first substrate and the second substrate. The reflective film is disposed on the second substrate. The touch sensing structure is disposed on the first outer surface of the first substrate.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: October 9, 2018
    Assignee: UNIDISPLAY INC.
    Inventors: Wei-Chieh Wang, Meng-Chia Chan, Sheng-Hsien Lin, Chun-Heng Lin
  • Patent number: 10035461
    Abstract: An electronic device includes a first substrate, a first electrode, a second substrate, a second electrode, an electrochromic material layer, a sealant, and a light shielding pattern layer. The first electrode is disposed on the first substrate. The second electrode is disposed on the second substrate. The electrochromic material layer is disposed between the first electrode and the second electrode. The sealant is disposed between the first substrate and the second substrate and surrounds the electrochromic material layer. The light shielding pattern layer is disposed on the first substrate. The light shielding pattern layer shields the sealant and a little portion of the electrochromic material layer near the sealant. The first electrode disposed on the first substrate and the second electrode disposed on the second substrate are not electrically connected to each other.
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: July 31, 2018
    Assignee: UNIDISPLAY INC.
    Inventors: Sheng-Hsien Lin, Leng-Chieh Lin, Wei-Chieh Wang, Meng-Chia Chan, Ming-Yuan Hsu
  • Patent number: 9778795
    Abstract: A touch apparatus including a first substrate, a touch sensing structure, an insulation layer, a driving electrode, an electrochromic layer, a reflective electrode and a second substrate stacked sequentially along a direction is provided. The driving electrode and the reflective electrode are used to drive the electrochromic layer. The driving electrode is contacted with the insulation layer. The insulation layer has a thickness T1 in the direction. The first substrate has a thickness T2 in the direction. T1<(T2/10).
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: October 3, 2017
    Assignee: UNIDISPLAY INC.
    Inventors: Wei-Chieh Wang, Meng-Chia Chan
  • Publication number: 20170190290
    Abstract: An electronic device includes a first substrate, a first electrode, a second substrate, a second electrode, an electrochromic material layer, a sealant, and a light shielding pattern layer. The first electrode is disposed on the first substrate. The second electrode is disposed on the second substrate. The electrochromic material layer is disposed between the first electrode and the second electrode. The sealant is disposed between the first substrate and the second substrate and surrounds the electrochromic material layer. The light shielding pattern layer is disposed on the first substrate. The light shielding pattern layer shields the sealant and a little portion of the electrochromic material layer near the sealant. The first electrode disposed on the first substrate and the second electrode disposed on the second substrate are not electrically connected to each other.
    Type: Application
    Filed: January 4, 2017
    Publication date: July 6, 2017
    Applicant: UNIDISPLAY INC.
    Inventors: Sheng-Hsien Lin, Leng-Chieh Lin, Wei-Chieh Wang, Meng-Chia Chan, Ming-Yuan Hsu
  • Publication number: 20170160846
    Abstract: A touch apparatus including a first substrate, a first translucent electrode, a second substrate, an electrochromic layer, a reflective film, and a touch sensing structure is provided. The first substrate has a first inner surface and a first outer surface opposite to each other. The first translucent electrode is disposed on the first inner surface. The second substrate is disposed opposite to the first substrate. The electrochromic layer is located between the first inner surface of the first substrate and the second substrate. The reflective film is disposed on the second substrate. The touch sensing structure is disposed on the first outer surface of the first substrate.
    Type: Application
    Filed: February 3, 2016
    Publication date: June 8, 2017
    Inventors: Wei-Chieh Wang, Meng-Chia Chan, Sheng-Hsien Lin, Chun-Heng Lin