Patents by Inventor Wei-Chung Chang
Wei-Chung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240162618Abstract: An antenna structure includes a metal mechanism element, a ground element, a feeding radiation element, a first radiation element, a second radiation element, a parasitic radiation element, a tuning circuit, and a nonconductive support element. The metal mechanism element has a slot. The metal mechanism element includes a first grounding portion and a second grounding portion. The slot is positioned between the first grounding portion and the second grounding portion. The feeding radiation element has a feeding point. The first radiation element is coupled to the feeding radiation element. The second radiation element is coupled to the feeding radiation element. The parasitic radiation element is coupled to the ground element. The parasitic radiation element is adjacent to the first radiation element and the second radiation element. The tuning circuit is coupled between the first grounding portion and the second grounding portion of the metal mechanism element.Type: ApplicationFiled: October 18, 2023Publication date: May 16, 2024Inventors: Wei-Chung CHANG, Shang-Ching TSENG
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Patent number: 11982798Abstract: A projection lens includes a first lens group, a second lens group and an aperture stop. The first lens group is disposed between a reduced side and a magnified side. The second lens is disposed between the first lens group and the magnified side. The second lens group has a light incident surface, a reflective surface and a light emitting surface, the light incident surface faces the first lens group, the light emitting surface faces a projection surface, the light incident surface, the light emitting surface and the first lens group are disposed at a single side of the reflective surface, and at least one of the light incident surface, the reflective surface and the light emitting surface is a freeform surface. The aperture stop is disposed between the first lens group and the second lens group. Moreover, a projection apparatus including the projection lens is also provided.Type: GrantFiled: November 5, 2021Date of Patent: May 14, 2024Assignee: Coretronic CorporationInventors: Hsin-Hsiang Lo, Wei-Ting Wu, Fu-Ming Chuang, Chuan-Chung Chang, Ching-Chuan Wei
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Publication number: 20240145554Abstract: Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure, the method includes forming a buffer layer over a substrate. An active layer is formed on the buffer layer. A top electrode is formed on the active layer. An etch process is performed on the buffer layer and the substrate to define a plurality of pillar structures. The plurality of pillar structures include a first pillar structure laterally offset from a second pillar structure. At least portions of the first and second pillar structures are spaced laterally between sidewalls of the top electrode.Type: ApplicationFiled: January 11, 2024Publication date: May 2, 2024Inventors: Yao-Chung Chang, Chun Lin Tsai, Ru-Yi Su, Wei Wang, Wei-Chen Yang
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Patent number: 11973260Abstract: A light-transmitting antenna includes a substrate, a first and a second conductive pattern. The first and the second conductive pattern is disposed on a first and a second surface of the substrate respectively. The first conductive pattern includes a first feeder unit, a first and a second radiation unit, a first and a second coupling unit and a first parasitic unit. The first feeder unit is connected to the second radiation unit. The first and the second radiation unit are located between the first and the second coupling unit. One side and the other side of the first parasitic unit is connected to the second coupling unit and adjacent to the first coupling unit respectively. The second conductive pattern includes a second feeder unit, a third coupling unit, a second parasitic unit, and a fourth coupling unit.Type: GrantFiled: November 9, 2022Date of Patent: April 30, 2024Assignee: Industrial Technology Research InstituteInventors: Ruo-Lan Chang, Mei-Ju Lee, Cheng-Hua Tsai, Meng-Hsuan Chen, Wei-Chung Chen
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Patent number: 11966628Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.Type: GrantFiled: June 2, 2022Date of Patent: April 23, 2024Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Wei-Chen Wang, Han-Wen Hu, Yung-Chun Li, Huai-Mu Wang, Chien-Chung Ho, Yuan-Hao Chang, Tei-Wei Kuo
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Publication number: 20240128122Abstract: Semiconductor package includes substrate, first barrier layer, second barrier layer, routing via, first routing pattern, second routing pattern, semiconductor die. Substrate has through hole with tapered profile, wider at frontside surface than at backside surface of substrate. First barrier layer extends on backside surface. Second barrier layer extends along sidewalls of through hole and on frontside surface. Routing via fills through hole and is separated from sidewalls of through hole by at least second barrier layer. First routing pattern extends over first barrier layer on backside surface and over routing via. First routing pattern is electrically connected to end of routing via and has protrusion protruding towards end of routing via in correspondence of through hole. Second routing pattern extends over second barrier layer on frontside surface. Second routing pattern directly contacts another end of routing via. Semiconductor die is electrically connected to routing via by first routing pattern.Type: ApplicationFiled: December 25, 2023Publication date: April 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chung Chang, Ming-Che Ho, Hung-Jui Kuo
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Publication number: 20240120656Abstract: A light-transmitting antenna includes a substrate, a first conductive pattern, and a second conductive pattern. The first conductive pattern has a first feeder unit, a first radiation unit, a second radiation unit, and a first connection unit. The first feeder unit and the first connection unit are connected to two sides of the first radiation unit. The first connection unit connects the first radiation unit and the second radiation unit. The second conductive pattern has a second feeder unit, a third radiation unit, a fourth radiation unit, and a second connection unit. The second feeder unit and the second connection unit are connected to two sides of the third radiation unit. The second connection unit connects the third radiation unit and the fourth radiation unit. An orthogonal projection of the second feeder unit on a first surface of the substrate at least partially overlaps the first feeder unit.Type: ApplicationFiled: December 22, 2022Publication date: April 11, 2024Applicant: Industrial Technology Research InstituteInventors: Meng-Hsuan Chen, Cheng-Hua Tsai, Mei-Ju Lee, Ruo-Lan Chang, Wei-Chung Chen
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Publication number: 20240096849Abstract: A semiconductor structure includes a semiconductor die, a redistribution circuit structure, and a terminal. The redistribution circuit structure is disposed on and electrically coupled to the semiconductor die. The terminal is disposed on and electrically coupled to the redistribution circuit structure, where the redistribution circuit structure is disposed between the semiconductor die and the terminal, and the terminal includes an under-bump metallization (UBM) and a capping layer. The UBM is disposed on and electrically coupled to the redistribution circuit structure, where the UBM includes a recess. The capping layer is disposed on and electrically coupled to the UBM, where the UBM is between the capping layer and the redistribution circuit structure, and the capping layer fills the recess of the UBM.Type: ApplicationFiled: January 9, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chung Chang, Ming-Che Ho, Hung-Jui Kuo
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Patent number: 11901230Abstract: Semiconductor package includes substrate, first barrier layer, second barrier layer, routing via, first routing pattern, second routing pattern, semiconductor die. Substrate has through hole with tapered profile, wider at frontside surface than at backside surface of substrate. First barrier layer extends on backside surface. Second barrier layer extends along sidewalls of through hole and on frontside surface. Routing via fills through hole and is separated from sidewalls of through hole by at least second barrier layer. First routing pattern extends over first barrier layer on backside surface and over routing via. First routing pattern is electrically connected to end of routing via and has protrusion protruding towards end of routing via in correspondence of through hole. Second routing pattern extends over second barrier layer on frontside surface. Second routing pattern directly contacts another end of routing via. Semiconductor die is electrically connected to routing via by first routing pattern.Type: GrantFiled: August 30, 2021Date of Patent: February 13, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chung Chang, Ming-Che Ho, Hung-Jui Kuo
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Publication number: 20240047308Abstract: A semiconductor package includes a substrate, a composite seed-barrier layer, a routing via, and a semiconductor die. The substrate has a through hole formed therethrough. The composite seed-barrier layer extends on sidewalls of the through hole and includes a first barrier layer, a seed layer, and a second barrier layer sequentially stacked on the sidewalls of the through hole. The routing via fills the through hole and is separated from the substrate by the composite seed-barrier layer. The semiconductor die is electrically connected to the routing via. Along the sidewalls of the through holes, at a level height corresponding to half of a total thickness of the substrate, the seed layer is present as inclusions of seed material surrounded by barrier material of the first barrier layer and the second barrier layer.Type: ApplicationFiled: October 5, 2023Publication date: February 8, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chung Chang, Ming-Che Ho, Hung-Jui Kuo
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Patent number: 11823981Abstract: A semiconductor package includes a substrate, a composite seed-barrier layer, a routing via, and a semiconductor die. The substrate has a through hole formed therethrough. The composite seed-barrier layer extends on sidewalls of the through hole and includes a first barrier layer, a seed layer, and a second barrier layer sequentially stacked on the sidewalls of the through hole. The routing via fills the through hole and is separated from the substrate by the composite seed-barrier layer. The semiconductor die is electrically connected to the routing via. Along the sidewalls of the through holes, at a level height corresponding to half of a total thickness of the substrate, the seed layer is present as inclusions of seed material surrounded by barrier material of the first barrier layer and the second barrier layer.Type: GrantFiled: August 27, 2021Date of Patent: November 21, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chung Chang, Ming-Che Ho, Hung-Jui Kuo
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Publication number: 20230226230Abstract: A compound for measurement of thiopurine pathway directed systems imaging and therapy including a chelator and a thiopurine ligand is provided. A method of synthesizing the compound is also provided, and the compound may be further prepared in pharmaceutical formulations or kits for therapy or molecular imaging.Type: ApplicationFiled: February 26, 2021Publication date: July 20, 2023Applicant: SEECURE TAIWAN CO., LTD.Inventors: Wei-Chung CHANG, David J. YANG, Min-Ching CHUNG, Chi-Shiang KE, Tsung-Tien KUO
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Publication number: 20230069737Abstract: A semiconductor package includes a substrate, a composite seed-barrier layer, a routing via, and a semiconductor die. The substrate has a through hole formed therethrough. The composite seed-barrier layer extends on sidewalls of the through hole and includes a first barrier layer, a seed layer, and a second barrier layer sequentially stacked on the sidewalls of the through hole. The routing via fills the through hole and is separated from the substrate by the composite seed-barrier layer. The semiconductor die is electrically connected to the routing via. Along the sidewalls of the through holes, at a level height corresponding to half of a total thickness of the substrate, the seed layer is present as inclusions of seed material surrounded by barrier material of the first barrier layer and the second barrier layer.Type: ApplicationFiled: August 27, 2021Publication date: March 2, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chung Chang, Ming-Che Ho, Hung-Jui Kuo
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Publication number: 20230065788Abstract: Semiconductor package includes substrate, first barrier layer, second barrier layer, routing via, first routing pattern, second routing pattern, semiconductor die. Substrate has through hole with tapered profile, wider at frontside surface than at backside surface of substrate. First barrier layer extends on backside surface. Second barrier layer extends along sidewalls of through hole and on frontside surface. Routing via fills through hole and is separated from sidewalls of through hole by at least second barrier layer. First routing pattern extends over first barrier layer on backside surface and over routing via. First routing pattern is electrically connected to end of routing via and has protrusion protruding towards end of routing via in correspondence of through hole. Second routing pattern extends over second barrier layer on frontside surface. Second routing pattern directly contacts another end of routing via. Semiconductor die is electrically connected to routing via by first routing pattern.Type: ApplicationFiled: August 30, 2021Publication date: March 2, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Chung Chang, Ming-Che Ho, Hung-Jui Kuo
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Patent number: 11146056Abstract: An interface control circuit complying with an interface specification includes: an interface signal transceiver circuit and a protection circuit. The interface signal transceiver circuit is coupled to a first interface connection pin and a second interface connection pin of a first interface connector circuit. The interface signal transceiver circuit is for transmitting and/or receiving an interface signal according to the interface specification. When the interface signal transceiver circuit operates under a first state, the protection circuit determines whether a foreign object exists between the first interface connection pin and the second interface connection pin according to a voltage change or a current change at the second interface connection pin. Under the first state, the interface signal transceiver circuit generates a pull-up signal and a pull-down signal which are toggled with each other at the first interface connection pin.Type: GrantFiled: May 13, 2020Date of Patent: October 12, 2021Assignee: RICHTEK TECHNOLOGY CORPORATIONInventors: Yu-Jen Cheng, Chih-Wei Mu, Sheng-Tsung Chen, Chieh-Min Lo, Wei-Chung Chang
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Patent number: 11090395Abstract: A composition for cross talk between estrogen receptors and cannabinoid receptors including a chelator and a receptor ligand is provided. A method of synthesizing the composition is also provided, and the composition may be further prepared in pharmaceutical formulations or kits for therapy or molecular imaging.Type: GrantFiled: September 14, 2018Date of Patent: August 17, 2021Assignee: SeeCure Taiwan Co., Ltd.Inventors: Tsung-Tien Kuo, David J. Yang, Wei-Chung Chang, Min-Ching Chung, Chi-Shiang Ke
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Publication number: 20210196655Abstract: A composition for cross talk between estrogen receptors and cannabinoid receptors including a chelator and a receptor ligand is provided. A method of synthesizing the composition is also provided, and the composition may be further prepared in pharmaceutical formulations or kits for therapy or molecular imaging.Type: ApplicationFiled: March 4, 2021Publication date: July 1, 2021Applicant: SeeCure Taiwan Co., Ltd.Inventors: Tsung-Tien Kuo, David J. Yang, Wei-Chung Chang, Min-Ching Chung, Chi-Shiang Ke
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Publication number: 20210119438Abstract: An interface control circuit complying with an interface specification includes: an interface signal transceiver circuit and a protection circuit. The interface signal transceiver circuit is coupled to a first interface connection pin and a second interface connection pin of a first interface connector circuit. The interface signal transceiver circuit is for transmitting and/or receiving an interface signal according to the interface specification. When the interface signal transceiver circuit operates under a first state, the protection circuit determines whether a foreign object exists between the first interface connection pin and the second interface connection pin according to a voltage change or a current change at the second interface connection pin. Under the first state, the interface signal transceiver circuit generates a pull-up signal and a pull-down signal which are toggled with each other at the first interface connection pin.Type: ApplicationFiled: May 13, 2020Publication date: April 22, 2021Inventors: Yu-Jen Cheng, Chih-Wei Mu, Sheng-Tsung Chen, Chieh-Min Lo, Wei-Chung Chang
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Patent number: 10616652Abstract: The disclosure proposes a playback method including displaying a first playback session which comprises an on-demand streaming session in a foreground of a display of the electronic device; switching, at a first playback time (t1), the first playback session from being displayed in the foreground to a background in which the on-demand streaming session ceases streaming; recording the t1 and a first clock time (T1) in response to switching the first playback session from being displayed in the foreground to the background; switching the first playback session back from the background to being displayed in the foreground; recording a second clock time (T2) in response to switching the first playback session back from the background to being displayed in the foreground; and changing the on-demand streaming session as being displayed in the foreground to a second playback time (t2) which is determined according to t2=t1+(T2?T1).Type: GrantFiled: August 4, 2017Date of Patent: April 7, 2020Assignee: Novatek Microelectronics Corp.Inventors: Wei-Chung Chang, Hsiang-An Wang
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Publication number: 20200085978Abstract: A composition for cross talk between estrogen receptors and cannabinoid receptors including a chelator and a receptor ligand is provided. A method of synthesizing the composition is also provided, and the composition may be further prepared in pharmaceutical formulations or kits for therapy or molecular imaging.Type: ApplicationFiled: September 14, 2018Publication date: March 19, 2020Applicant: SeeCure Taiwan Co., Ltd.Inventors: Tsung-Tien Kuo, David J. Yang, Wei-Chung Chang, Min-Ching Chung, Chi-Shiang Ke