Abstract: A hinge structure includes two hinge arms, two shaft gears, at least one first elastic piece, and at least one second elastic piece. Each hinge arm includes a central shaft. Each of the two shaft gears is connected to the central shaft, each shaft gear includes an extending portion, the groove is defined on the extending portion. Each first elastic piece includes two elastic arms, a first connecting portion, and two protrusions. The elastic arms are disposed on opposite sides of the first connecting portion, the elastic arms and the first connecting portion cooperatively form a first opening, the extending portion passes through the first opening, each protrusion is disposed on each elastic arm. Each second elastic piece is sleeved on the extending portion. The protrusions are configured to be accommodated in the groove. A terminal device is provided according to the present disclosure.

Abstract: A hinge structure is configured to be disposed between a first body and a second body. The hinge structure includes a first shaft assembly, at least two guiding members, a second shaft assembly, and two supporting plates. Each guiding member includes a first end and a second end, the first end is bent to form a sliding groove. The second shaft assembly is disposed in the sliding groove. The two supporting plates are connected to the first body and the second body, respectively, one end of each supporting plate is sleeved on the first shaft assembly, and another end of each supporting plate is fixed to the second end of, when the first body and the second body are closed to or opened with each other, the second shaft assembly is displaced relative to the guiding member. An electronic device is provided according to the present disclosure.

Abstract: Systems, devices and methods of manufacturing a system on silicon wafer (SoSW) device and package are described herein. A plurality of functional dies is formed in a silicon wafer. Different sets of masks are used to form different types of the functional dies in the silicon wafer. A first redistribution structure is formed over the silicon wafer and provides local interconnects between adjacent dies of the same type and/or of different types. A second redistribution structure may be formed over the first redistribution layer and provides semi-global and/or global interconnects between non-adjacent dies of the same type and/or of different types. An optional backside redistribution structure may be formed over a second side of the silicon wafer opposite the first redistribution layer. The optional backside redistribution structure may provide backside interconnects between functional dies of different types.

Abstract: A nucleic acid detection kit includes a kit body, a detection chip disposed in the kit body, and an electrophoresis box disposed outside of the kit body. The detection chip comprises a channel and is connected to the electrophoresis box. A microbead of testable material in solution undergoes a PCR amplification reaction, an electrophoretic process, and is fluoresced for highlighting, images of elements made fluorescent can be taken and displayed. A nucleic acid detection device which can receive the nucleic acid detection kit is also disclosed. The nucleic acid detection device has a simple structure suitable for home use, being portable, flexible, and convenient.

Abstract: A device for transferring liquids and liquid samples in certain quantities includes a housing, a pressing unit, a liquid extraction assembly, and a connecting member. The pressing unit includes an extrusion portion. The housing includes a first sidewall and a second top wall. The first sidewall and the second top wall cooperatively define a receiving cavity. The pressing unit is received in the receiving cavity. The liquid extraction assembly includes a liquid extraction pipe. The liquid extraction assembly is detachably connected to the housing through the connecting member. The pressing unit can move back and forth along the central axis of the receiving cavity, so as to move the extrusion portion back and forth relative to the liquid extraction pipe. The liquid extraction pipe is deformed by the extrusion portion to take up or release liquid in precise quantities.

Abstract: A camera module includes multiple camera units, a bracket, and multiple mounting rods. Each of the camera units includes a main body and a lens on the main body. The main body includes two protrusions. The two protrusions protrude from opposite sides of the main body. Each of the two protrusions includes a fixing hole. The bracket is mounted in an electronic device and includes multiple mounting holes and multiple mounting grooves disposing in a surface of the bracket. Each two of the multiple mounting grooves connect with corresponding mounting holes at opposite sides of the mounting holes. The mounting rods protrude from the mounting grooves. When the mounting holes receive the camera units, the corresponding mounting grooves receive the corresponding protrusions and the mounting rods pass through the corresponding fixing holes.

Abstract: A camera module includes multiple camera units, a bracket, and multiple mounting rods. Each of the camera units includes a main body and a lens on the main body. The main body includes two protrusions. The two protrusions protrude from opposite sides of the main body. Each of the two protrusions includes a fixing hole. The bracket is mounted in an electronic device and includes multiple mounting holes and multiple mounting grooves disposing in a surface of the bracket. Each two of the multiple mounting grooves connect with corresponding mounting holes at opposite sides of the mounting holes. The mounting rods protrude from the mounting grooves. When the mounting holes receive the camera units, the corresponding mounting grooves receive the corresponding protrusions and the mounting rods pass through the corresponding fixing holes.

Abstract: Semiconductor devices, having dual silicides, include a first fin, having N-type impurities, and a second fin, having P-type impurities, on a substrate. A first gate electrode and a first source/drain area are on the first fin. A second gate electrode and a second source/drain area are on the second fin. An etch stop layer is on the first source/drain area and the second source/drain area. An insulating layer is on the etch stop layer. A first plug connected to the first source/drain area and a second plug connected to the second source/drain area are formed through the insulating layer and the etch stop layer. A first metal silicide layer is in the first source/drain area. A second metal silicide layer having a material different from the first metal silicide layer and having a thickness smaller than the first metal silicide layer is in the second source/drain area.

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a substrate including a first region and a second region, a first transistor and a second transistor formed on the first region and the second region, respectively, a first contact formed on the first transistor, and a second contact formed on the second transistor. The first contact includes a first work function control layer having a first thickness and a first conductive layer formed on the first work function control layer, the second contact includes a second work function control layer having a second thickness different from the first thickness and a second conductive layer formed on the second work function control layer, and the first contact and the second contact have different work functions.

Abstract: A test pattern of a semiconductor device is provided, which includes first and second fins formed to project from a substrate and arranged to be spaced apart from each other, first and second gate structures formed to cross the first and second fins, respectively, a first source region and a first drain region arranged on the first fin on one side and the other side of the first gate structure, a second source region and a second drain region arranged on the second fin on one side and the other side of the second gate structure, a first conductive pattern connected to the first and second drain regions to apply a first voltage to the first and second drain regions and a second conductive pattern connecting the first source region and the second gate structure to each other.

Abstract: Semiconductor devices, having dual silicides, include a first fin, having N-type impurities, and a second fin, having P-type impurities, on a substrate. A first gate electrode and a first source/drain area are on the first fin. A second gate electrode and a second source/drain area are on the second fin. An etch stop layer is on the first source/drain area and the second source/drain area. An insulating layer is on the etch stop layer. A first plug connected to the first source/drain area and a second plug connected to the second source/drain area are formed through the insulating layer and the etch stop layer. A first metal silicide layer is in the first source/drain area. A second metal silicide layer having a material different from the first metal silicide layer and having a thickness smaller than the first metal silicide layer is in the second source/drain area.

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a substrate including a first region and a second region, a first transistor and a second transistor formed on the first region and the second region, respectively, a first contact formed on the first transistor, and a second contact formed on the second transistor. The first contact includes a first work function control layer having a first thickness and a first conductive layer formed on the first work function control layer, the second contact includes a second work function control layer having a second thickness different from the first thickness and a second conductive layer formed on the second work function control layer, and the first contact and the second contact have different work functions.

Abstract: A test pattern of a semiconductor device is provided, which includes first and second fins formed to project from a substrate and arranged to be spaced apart from each other, first and second gate structures formed to cross the first and second fins, respectively, a first source region and a first drain region arranged on the first fin on one side and the other side of the first gate structure, a second source region and a second drain region arranged on the second fin on one side and the other side of the second gate structure, a first conductive pattern connected to the first and second drain regions to apply a first voltage to the first and second drain regions and a second conductive pattern connecting the first source region and the second gate structure to each other.

Abstract: A method includes forming a gate stack over a semiconductor substrate, and forming a first silicon germanium (SiGe) region in the semiconductor substrate and adjacent the gate stack. The first SiGe region has a first atomic percentage of germanium to germanium and silicon. A second SiGe region is formed over the first SiGe region. The second SiGe region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is lower than the first atomic percentage, wherein the first and the second SiGe regions form a source/drain stressor of a metal-oxide-semiconductor (MOS) device.

Abstract: A method includes forming a gate stack over a semiconductor substrate, and forming a first silicon germanium (SiGe) region in the semiconductor substrate and adjacent the gate stack. The first SiGe region has a first atomic percentage of germanium to germanium and silicon. A second SiGe region is formed over the first SiGe region. The second SiGe region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is lower than the first atomic percentage, wherein the first and the second SiGe regions form a source/drain stressor of a metal-oxide-semiconductor (MOS) device.

Abstract: A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a SiGe region in the semiconductor substrate and adjacent the gate stack, wherein the SiGe region has a first atomic percentage of germanium to germanium and silicon; and a silicide region over the SiGe region. The silicide region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is substantially lower than the first atomic percentage.

Abstract: A semiconductor structure and methods for forming the same are provided. The semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a SiGe region in the semiconductor substrate and adjacent the gate stack, wherein the SiGe region has a first atomic percentage of germanium to germanium and silicon; and a silicide region over the SiGe region. The silicide region has a second atomic percentage of germanium to germanium and silicon. The second atomic percentage is substantially lower than the first atomic percentage.

Abstract: A photoresist with adjustable polarized light response and a photolithography process using the photoresist. The photoresist and the photolithography process are suitable for use in an exposure optical system with a high numerical aperture. The photoresist includes a photosensitive polymer that can absorb the exposure light source to generate an optical reaction. The photosensitive polymer can also be oriented along a direction of an electric field or a magnetic field. The response for the photosensitive upon a polarized light is determined by an angle between the predetermined direction and the polarized light. In addition, the photolithography process adjusts the orientation of the photosensitive polymer, so that the P-polarized light has a weaker response than that of the S-polarized light to compensate for the larger transmission coefficient of the P-polarized light with a high numerical aperture, so as to prevent the photoresist pattern deformation.

Abstract: A photoresist with adjustable polarized light response and a photolithography process using the photoresist. The photoresist and the photolithography process are suitable for use in an exposure optical system with a high numerical aperture. The photoresist includes a photosensitive polymer that can absorb the exposure light source to generate an optical reaction. The photosensitive polymer can also be oriented along a direction of an electric field or a magnetic field. The response for the photosensitive upon a polarized light is determined by an angle between the predetermined direction and the polarized light. In addition, the photolithography process adjusts the orientation of the photosensitive polymer, so that the P-polarized light has a weaker response than that of the S-polarized light to compensate for the larger transmission coefficient of the P-polarized light with a high numerical aperture, so as to prevent the photoresist pattern deformation.