Patents by Inventor Wei-Kai Wang

Wei-Kai Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152880
    Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.
    Type: Application
    Filed: February 13, 2023
    Publication date: May 9, 2024
    Applicant: OBOOK INC.
    Inventors: Chun-Kai Wang, Chung-Han Hsieh, Chun-Jen Chen, Po-Hua Lin, Wei-Te Lin, Pei-Hsuan Weng, Mei-Su Wang, I-Cheng Lin, Cheng-Wei Chen
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Patent number: 11950513
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a first metal interconnection and a second metal interconnection in the first IMD layer; forming a channel layer on the first metal interconnection and the second metal interconnection; forming a magnetic tunneling junction (MTJ) stack on the channel layer; and removing the MTJ stack to form a MTJ.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: April 2, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Wei Chen, Po-Kai Hsu, Yu-Ping Wang, Hung-Yueh Chen
  • Publication number: 20240088033
    Abstract: A method of forming a semiconductor device is provided. A transistor is formed at a first side of the substrate and a first dielectric layer is formed aside the transistor. A first metal via is formed through the first dielectric layer and aside the transistor. A first interconnect structure is formed over the first side of the substrate and electrically connected to the transistor and the first metal via. The substrate is thinned from a second side of the substrate. A capacitor is formed at the second side of the substrate and a second dielectric layer is formed aside the capacitor. A second metal via is formed through the second dielectric layer and the substrate and electrically connected to the first metal via.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Kai Chan, Chung-Hao Tsai, Chuei-Tang WANG, Wei-Ting Chen
  • Patent number: 8978426
    Abstract: A hidden shackle style lock is disclosed. The lock has a substantially cylindrical housing having a top surface, a bottom surface, and a curved side surface. The lock also has a first cavity on the bottom surface of the housing which extends part way along a thickness of the housing, and a second cavity on the side surface intersecting with the first cavity. The lock further includes has a hollow sleeve slidably attached within the second cavity. The sleeve has a first end face, a second end face, and a third cavity. The third cavity extends from the first end face to the second face and is substantially coaxial with the second cavity. A shackle is coupled to the first end face of the sleeve. A core member with a locking mechanism is disposed within the third cavity and coupled to the shackle. A driver member is located between the core member and the shackle and couples the core member to the shackle.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: March 17, 2015
    Assignee: Pacific Lock Company
    Inventor: Wei Kai Wang
  • Patent number: 8776557
    Abstract: A hidden shackle style lock is disclosed. The lock includes a substantially cylindrical housing having a top surface, a bottom surface, and a curved side surface. The lock also includes a first cavity on the bottom surface of the housing extending part way along a thickness of the housing, and a second cavity on the side surface intersecting with the first cavity. A hollow sleeve is slidably attached within the second cavity. The sleeve includes a first end face, a second end face, and a third cavity. The third cavity extends from the first end face to the second face and is substantially coaxial with the second cavity. A shackle having a first end and a second end is fixedly coupled to the first end face of the sleeve. The lock also includes an interchangeable core having a first locking mechanism and a second locking mechanism lockingly disposed within the third cavity, and coupled to the straight shackle.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: July 15, 2014
    Assignee: Pacific Lock Company
    Inventor: Wei Kai Wang
  • Patent number: 8529575
    Abstract: A surgical clamp includes first and second supports respectively having first and second engagement sections. The first and second supports are pivotably connected at a connection by a pivotal portion such that the first and second supports are pivotable about a pivot axis extending through the connection. An opening is defined between the first and second engagement sections for receiving a bone of a patient. A connecting tube includes a first end fixed to the connection. A guiding tube includes an end connected to a second end of the connecting tube and is located in a central plane of the opening between the first and second engagement sections. The central plane includes the pivot axis and has equal spacing to the first and second engagement sections. A sliding rod is fixed to the connecting tube and includes a sliding groove slideably receiving a pole located on the pivotal portion.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: September 10, 2013
    Assignee: Intai Technology Corp.
    Inventors: Yung-Fang Tsai, Wei-Kai Wang, Yung-Fu Liao, Din-Hsiang Tseng
  • Publication number: 20120245632
    Abstract: A bone anchor comprises a screw body and a flange, which are joined together in a way to keep their rotation independent from each other. In implanting the screw body into a bone, the flange does not rotate to prevent twisting and/or snarling of the suture in wounded bone from occurring.
    Type: Application
    Filed: September 3, 2011
    Publication date: September 27, 2012
    Applicant: INTAI TECHNOLOGY CORP.
    Inventors: Yung-Fang Tsai, Wei-Kai Wang, Yang-Hwei Tsuang, Yi-Jie Kuo
  • Publication number: 20120197291
    Abstract: A surgical clamp includes first and second supports respectively having first and second engagement sections. The first and second supports are pivotably connected at a connection by a pivotal portion such that the first and second supports are pivotable about a pivot axis extending through the connection. An opening is defined between the first and second engagement sections for receiving a bone of a patient. A connecting tube includes a first end fixed to the connection. A guiding tube includes an end connected to a second end of the connecting tube and is located in a central plane of the opening between the first and second engagement sections. The central plane includes the pivot axis and has equal spacing to the first and second engagement sections. A sliding rod is fixed to the connecting tube and includes a sliding groove slideably receiving a pole located on the pivotal portion.
    Type: Application
    Filed: August 10, 2011
    Publication date: August 2, 2012
    Inventors: Yung-Fang Tsai, Wei-Kai Wang, Yung-Fu Liao, Din-Hsiang Tseng
  • Patent number: 7956373
    Abstract: The invention discloses a semiconductor light-emitting device and a fabricating method thereof. The semiconductor light-emitting device according to the invention includes a substrate, a multi-layer structure, a top-most layer, and at least one electrode. The multi-layer structure is formed on the substrate and includes a light-emitting region. The top-most layer is formed on the multi-layer structure, and the lower part of the sidewall of the top-most layer exhibits a first surface morphology relative to a first pattern. In addition, the upper part of the sidewall of the top-most layer exhibits a second surface morphology relative to a second pattern. The first pattern is different from the second pattern. The at least one electrode is formed on the top-most layer.
    Type: Grant
    Filed: April 17, 2008
    Date of Patent: June 7, 2011
    Assignee: Huga Optotech, Inc.
    Inventors: Wei-Kai Wang, Su-Hui Lin, Wen-Chung Shih
  • Patent number: 7947991
    Abstract: A high efficiency lighting device comprising a light emitting diode structure, an eutectic layer and a distributed-Bragg reflecting layer (DBR) therebetween is disclosed. The distributed-Bragg reflecting layer is attached to said light emitting diode structure by vapor deposition and comprises a plurality of high refraction layers, a plurality of low refraction layers and a micro-contact layer array. The high refraction layers and said low refraction layers are arranged in an alternating manner, so as to form a stacked thin film having an alternate high/low refraction pattern. The micro-contact layers are in said stacked thin film and extend vertically through the stacked thin film, therefore connecting said light emitting diode structure and said eutectic layer.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: May 24, 2011
    Assignee: Huga Optotech Inc.
    Inventors: Wei-Kai Wang, Su-Hui Lin, Wen-Chung Shih
  • Patent number: 7923744
    Abstract: The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. At least one recess is formed in the sidewall of each bump structure. Alternatively, the sidewall of each bump structure has a curved contour.
    Type: Grant
    Filed: April 6, 2010
    Date of Patent: April 12, 2011
    Assignee: HUGA Optotech Inc.
    Inventors: Tzong-Liang Tsai, Wei-Kai Wang, Su-Hui Lin, Yi-Cun Lu
  • Publication number: 20100230706
    Abstract: The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. At least one recess is formed in the sidewall of each bump structure. Alternatively, the sidewall of each bump structure has a curved contour.
    Type: Application
    Filed: April 6, 2010
    Publication date: September 16, 2010
    Applicant: HUGA OPTOTECH INC.
    Inventors: Tzong Liang Tsai, Wei-Kai Wang, Su-Hui Lin, Yi-Cun Lu
  • Patent number: 7768027
    Abstract: The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. Each bump structure is made of ITO, SiO2, SiN, ZnO, polymide, BCB, SOG, InO, or SnO.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: August 3, 2010
    Assignee: Huga Optotech Inc.
    Inventors: Tzong-Liang Tsai, Wei-Kai Wang, Su-Hui Lin, Yi-Cun Lu
  • Publication number: 20100025704
    Abstract: A method for fabricating a high efficiency lighting device and the structure thereof are disclosed. The method includes the following steps: providing a light emitting diode structure; attaching a distributed-Bragg reflecting layer (DBR) to the light emitting diode structure by vapor deposition; and connecting the light emitting diode structure to a eutectic layer through the distributed-Bragg reflecting layer to form the high efficiency lighting device.
    Type: Application
    Filed: July 29, 2008
    Publication date: February 4, 2010
    Applicant: HUGA OPTOTECH INC.
    Inventors: Wei-Kai Wang, Su-Hui Lin, Wen-Chung Shih
  • Publication number: 20100025705
    Abstract: A high efficiency luminous device and a manufacturing method thereof are disclosed. The high efficiency luminous device includes a LED structure, a first metal electrode, and a second metal electrode. The LED structure is for emitting light. The first metal electrode is formed on the LED structure, and the first metal electrode has a plurality of first openings therein. The second metal electrode is formed on the LED structure, and the second metal electrode has a plurality of second openings therein. The plurality of first openings and the plurality of second openings allow the light emitted from the LED structure to pass therethrough.
    Type: Application
    Filed: July 30, 2008
    Publication date: February 4, 2010
    Applicant: HUGA OPTOTECH INC.
    Inventors: Wei-Kai Wang, Su-Hui Lin, Wen-Chung Shih
  • Publication number: 20090212311
    Abstract: The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. Each bump structure is made of ITO, SiO2, SiN, ZnO, polymide, BCB, SOG, InO, or SnO.
    Type: Application
    Filed: August 1, 2008
    Publication date: August 27, 2009
    Inventors: Tzong-Liang Tsai, Wei-Kai Wang, Su-Hui Lin, Yi-Cun Lu
  • Publication number: 20090212312
    Abstract: The invention discloses a semiconductor light-emitting device, which includes a substrate, a first conductive type semiconductor material layer, a second conductive type semiconductor material layer, a light-emitting layer, a first electrode, a second electrode, and a plurality of bump structures. The first conductive type semiconductor material layer is formed on the substrate and has an upper surface which includes a first region and a second region distinct from the first region. The first electrode is formed on the first region. The light-emitting layer and the second conductive type semiconductor material layer are formed on the second region. The bump structures are formed on the upper surface of the first conductive type semiconductor material layer and between the first region and the second region. Each bump structure is made of ITO, SiO2, SiN, ZnO, polymide, BCB, SOG, InO, or SnO.
    Type: Application
    Filed: November 12, 2008
    Publication date: August 27, 2009
    Inventors: Tzong-Liang TSAI, Wei-Kai Wang, Su-Hui Lin, Yi-Cun Lu
  • Publication number: 20090008657
    Abstract: A semiconductor light-emitting device and a method of fabricating the same are provided. The semiconductor light-emitting device includes a substrate, a multi-layer structure and an ohmic electrode structure. The substrate has a first upper surface and a plurality of first recesses formed in the first upper surface. The multi-layer structure is formed on the first upper surface of the substrate and includes a light-emitting region. A bottom-most layer of the multi-layer structure is formed on the first upper surface of the substrate. The bottom-most layer has a second upper surface and a plurality of second recesses formed in the second upper surface. The second recesses project on the first upper surface. The ohmic electrode structure is formed on the multi-layer structure.
    Type: Application
    Filed: December 3, 2007
    Publication date: January 8, 2009
    Inventor: Wei-Kai Wang
  • Publication number: 20080258163
    Abstract: The invention discloses a semiconductor light-emitting device and a fabricating method thereof. The semiconductor light-emitting device according to the invention includes a substrate, a multi-layer structure, a top-most layer, and at least one electrode. The multi-layer structure is formed on the substrate and includes a light-emitting region. The top-most layer is formed on the multi-layer structure, and the lower part of the sidewall of the top-most layer exhibits a first surface morphology relative to a first pattern. In addition, the upper part of the sidewall of the top-most layer exhibits a second surface morphology relative to a second pattern. The at least one electrode is formed on the top-most layer. Therefore, the sidewall of the semiconductor light-emitting device according to the invention exhibits a surface morphology, which increases the light-extraction area of the sidewall, and consequently enhances the light-extraction efficiency of the semiconductor light-emitting device.
    Type: Application
    Filed: April 17, 2008
    Publication date: October 23, 2008
    Inventors: Wei-Kai Wang, Su-Hui Lin, Wen-Chung Shih