Patents by Inventor Wei Kuo
Wei Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240187622Abstract: A decoder includes circuitry which, in operation, parses a first flag indicating whether a CCALF (cross component adaptive loop filtering) process is enabled for a first block located adjacent to a left side of a current block; parses a second flag indicating whether the CCALF process is enabled for a second block located adjacent to an upper side of the current block; determines a first index associated with a color component of the current block; and derives a second index indicating a context model, using the first flag, the second flag, and the first index. The circuitry, in operation, performs entropy decoding of a third flag indicating whether the CCALF process is enabled for the current block, using the context model indicated by the second index; and performs the CCALF process on the current block in response to the third flag indicating the CCALF process is enabled for the current block.Type: ApplicationFiled: January 22, 2024Publication date: June 6, 2024Inventors: Che-Wei KUO, Chong Soon LIM, Han Boon TEO, Jing Ya LI, Hai Wei SUN, Chu Tong WANG, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
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Publication number: 20240187544Abstract: A target tracking system includes an observation module, a dynamic tracking module, a control module and an aiming module. The observation module captures an observation frame including a tracked-object image of a tracked-object and an aiming point image and detects a distance between the observation module and the tracked-object. The dynamic tracking module analyzes the observation frame to obtain a lag correction vector between the aiming point image and the tracked-object image, and obtains a feed-forward correction vector according to the lag correction vector and the distance. The control module generates a control command representing the lag correction vector and a control command representing the feed-forward correction vector. The aiming module moves according to the control commands to control the aiming point image to align with the tracked-object image and control the aiming point image to lead the tracked-object image.Type: ApplicationFiled: December 27, 2022Publication date: June 6, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chung-Wei CHANG, Yi-Ling LEE, Chia-Jung LIU, Yin-Ling KUO, Feng-Chi LI
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Publication number: 20240186204Abstract: A semiconductor structure includes a semiconductor substrate, a semiconductor device and a heating structure. The semiconductor substrate includes a device region and a heating region surrounding the device region. The semiconductor device is located on the device region. The heating structure is located on the heating region and includes an intrinsic semiconductor area, at least one heating element and at least one heating pad. The intrinsic semiconductor area is surrounding the semiconductor device. The at least one heating element is located at a periphery of the intrinsic semiconductor area. The at least one heating pad is joined with the at least one heating element, wherein the at least one heating pad includes a plurality of contact structures, and a voltage is supplied from the plurality of contact structures to control a temperature of the at least one heating element.Type: ApplicationFiled: January 11, 2024Publication date: June 6, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Tsung Shih, Chewn-Pu Jou, Stefan Rusu, Feng-Wei KUO
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Publication number: 20240186320Abstract: In some embodiments, the present disclosure relates to a semiconductor device comprising a source and drain region arranged within a substrate. A conductive gate is disposed over a doped region of the substrate. A gate dielectric layer is disposed between the source region and the drain region and separates the conductive gate from the doped region. A bottommost surface of the gate dielectric layer is below a topmost surface of the substrate. First and second sidewall spacers are arranged along first and second sides of the conductive gate, respectively. An inner portion of the first sidewall spacer and an inner portion of the second sidewall spacer respectively cover a first and second top surface of the gate dielectric layer. A drain extension region and a source extension region respectively separate the drain region and the source region from the gate dielectric layer.Type: ApplicationFiled: February 14, 2024Publication date: June 6, 2024Inventors: Yi-Huan Chen, Chien-Chih Chou, Ta-Wei Lin, Hsiao-Chin Tuan, Alexander Kalnitsky, Kong-Beng Thei, Shi-Chuang Hsiao, Yu-Hong Kuo
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Publication number: 20240186275Abstract: Semiconductor devices including the use of solder materials and methods of manufacturing are provided. In embodiments the solder materials utilize a first tensile raising material, a second tensile raising material, and a eutectic modifier material. By utilizing the materials a solder material can be formed and used with a reduced presence of needles that may otherwise form during the placement and use of the solder material.Type: ApplicationFiled: January 9, 2023Publication date: June 6, 2024Inventors: Chao-Wei Chiu, Jen-Jui Yu, Hsuan-Ting Kuo, Cheng-Shiuan Wong, Hsiu-Jen Lin, Ching-Hua Hsieh
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Patent number: 11999944Abstract: A method for promoting growth of a probiotic microorganism includes cultivating the probiotic microorganism in a growth medium containing a fermented culture of lactic acid bacterial strains that include Lactobacillus salivarius subsp. salicinius AP-32 deposited at the China Center for Type Culture Collection (CCTCC) under CCTCC M 2011127, Lactobacillus plantarum LPL28 deposited at the China General Microbiological Culture Collection Center (CGMCC) under CGMCC 17954, Lactobacillus acidophilus TYCA06 deposited at the CGMCC under CGMCC 15210, and Bifidobacterium longum subsp. infantis BLI-02 deposited at the CGMCC under CGMCC 15212.Type: GrantFiled: April 19, 2022Date of Patent: June 4, 2024Assignee: GLAC BIOTECH CO., LTD.Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yu-Fen Huang, Cheng-Chi Lin, Chen-Hung Hsu, Tsai-Hsuan Yi, Yu-Wen Chu, Yi-Wei Kuo, Jui-Fen Chen, Shin-Yu Tsai
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Publication number: 20240179348Abstract: Implementations of the disclosure provide a video decoding apparatus and method for transform coefficient sign prediction on a video decoder side. The method may include selecting a set of candidate transform coefficients from dequantized transform coefficients. The method may include applying a template-based hypothesis generation scheme to select a hypothesis from a plurality of candidate hypotheses for the set of candidate transform coefficients. The method may include determining a combination of sign candidates associated with the selected hypothesis to be a set of predicted signs for the set of candidate transform coefficients. The method may include estimating original signs for the set of candidate transform coefficients based on the set of predicted signs and a sequence of sign signaling bits received from a video encoder. The method may include updating the dequantized transform coefficients based on the estimated original signs for the set of candidate transform coefficients.Type: ApplicationFiled: February 7, 2024Publication date: May 30, 2024Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.Inventors: Xiaoyu Xiu, Ning YAN, Yi-Wen Chen, Che-Wei KUO, Wei CHEN, Hong-Jheng Jhu, Xianglin Wang, Bing Yu
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Publication number: 20240178102Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.Type: ApplicationFiled: April 21, 2023Publication date: May 30, 2024Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
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Patent number: 11996037Abstract: A scan-type display apparatus includes an LED array and a data driver. The LED array has a common anode configuration, and includes multiple scan lines, multiple data lines and multiple LEDs. The data driver includes multiple data driving circuits, each of which includes a current driver and a detector. The current driver has an output terminal connected to the data line corresponding to the data driving circuit, and outputs one of a drive current and a clamp voltage at the output terminal of the current driver based on a pulse width control signal. The detector is connected to the current driver, and generates a detection signal that indicates whether any one of the LEDs connected to the data line corresponding to the data driving circuit is short circuited based on a detection timing signal and a feed-in voltage related to a voltage at the output terminal of the current driver.Type: GrantFiled: December 5, 2022Date of Patent: May 28, 2024Assignee: MACROBLOCK, INC.Inventors: Chi-Min Hsieh, Che-Wei Chang, Chen-Yuan Kuo, Wei-Hsiang Cheng
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Publication number: 20240171735Abstract: Implementations of the disclosure provide systems and methods for motion compensation prediction. The method may include performing, by a video processor, a geometry partition on a video block of a video frame from a video to obtain a first partition and a second partition. The method may further include applying, by the video processor, a first motion prediction mode to the first partition and a second motion prediction mode to the second partition. At least one of the first motion prediction mode or the second motion prediction mode is an affine motion prediction mode.Type: ApplicationFiled: January 8, 2024Publication date: May 23, 2024Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.Inventors: Ning YAN, Xiaoyu XIU, Che-Wei KUO, Wei CHEN, Yi-Wen CHEN, Hong-Jheng Jhu, Xianglin WANG, Bing YU
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Publication number: 20240165553Abstract: The present invention provides a dehumidification and water collection structure disposed on one side of a temperature control device. The temperature control device is used for converting a temperature to a first temperature. The temperature is greater than the first temperature. The temperature control device includes a temperature conduction device. The temperature conduction device covers one side of the temperature control device. A hydrophilic structure is formed on the surface of the mesh member and used for condensing the vapor in the air. A first side of the mesh member is disposed on the other side of the temperature conduction device. A capillary structure layer is formed between the mesh member and the temperature conduction device. After thermal equilibrium between the air and the mesh member, an air temperature of the air is lowered to a dew temperature and condensing the vapor in the air on the mesh member.Type: ApplicationFiled: February 6, 2023Publication date: May 23, 2024Inventors: HUEI-CHU WENG, CHUN-CHING KUO, KUN-DA WU, SHENG-WEI LO
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Patent number: 11990383Abstract: A conductive structure, includes: a plurality of conductive layers; a plurality of conductive pillars being formed on the plurality of conductive layers, respectively; and a molding compound laterally coating the plurality of conductive pillars. Each of the plurality of conductive pillars is a taper-shaped conductive pillar, and is tapered from the conductive layers.Type: GrantFiled: November 2, 2022Date of Patent: May 21, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hung-Jui Kuo, Hui-Jung Tsai, Tai-Min Chang, Chia-Wei Wang
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Patent number: 11990429Abstract: A method includes bonding a second package component to a first package component, bonding a third package component to the first package component, attaching a dummy die to the first package component, encapsulating the second package component, the third package component, and the dummy die in an encapsulant, and performing a planarization process to level a top surface of the second package component with a top surface of the encapsulant. After the planarization process, an upper portion of the encapsulant overlaps the dummy die. The dummy die is sawed-through to separate the dummy die into a first dummy die portion and a second dummy die portion. The upper portion of the encapsulant is also sawed through.Type: GrantFiled: November 28, 2022Date of Patent: May 21, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Wei Wu, Ying-Ching Shih, Kung-Chen Yeh, Li-Chung Kuo, Pu Wang, Szu-Wei Lu
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Publication number: 20240160828Abstract: A method of generating an IC layout diagram includes receiving an IC layout diagram including a gate region and a gate via, the gate via being positioned at a location within an active region and along a width of the gate region extending across the active region, receiving a first gate resistance value of the gate region, retrieving a second gate resistance value from a resistance value reference based on the location and the width, using the first and second resistance values to determine that the IC layout diagram does not comply with a design specification, and based on the non-compliance with the design specification, modifying the IC layout diagram.Type: ApplicationFiled: January 24, 2024Publication date: May 16, 2024Inventors: Ke-Ying SU, Jon-Hsu HO, Ke-Wei SU, Liang-Yi CHEN, Wen-Hsing HSIEH, Wen-Koi LAI, Keng-Hua KUO, KuoPei LU, Lester CHANG, Ze-Ming WU
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Publication number: 20240160080Abstract: In an embodiment, a phase shifter includes: a light input end; a light output end; a p-type semiconductor material, and an n-type semiconductor material contacting the p-type semiconductor material along a boundary area, wherein the boundary area is greater than a length from the light input end to the light output end multiplied by a core width of the phase shifter.Type: ApplicationFiled: January 26, 2024Publication date: May 16, 2024Inventors: Huan-Neng CHEN, Chewn-Pu JOU, Lan-Chou CHO, Feng-Wei KUO
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Publication number: 20240164008Abstract: A molded electronic assembly including a circuit substrate, a plurality of electronic devices, and at least one patterned heat dissipation structure is provided. The circuit substrate includes a substrate and a circuit, where the substrate has a top surface, and the circuit has a plurality of signal contacts distributed on the top surface. The electronic devices are disposed on the circuit substrate, and each of the electronic devices has a plurality of device pins connected to the signal contacts. The at least one patterned heat dissipation structure corresponds to a signal contact of the signal contacts and starts from the corresponding signal contact and extends toward a plurality of directions on the top surface of the substrate.Type: ApplicationFiled: November 10, 2023Publication date: May 16, 2024Applicant: Industrial Technology Research InstituteInventors: Li-Wei Yao, Hsiao-Fen Wei, Chung-Wei Wang, Shu-Wei Kuo
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Patent number: 11983377Abstract: A touch module includes a base plate, a magnet, a touchpad and a magnetic board. The magnetic board includes a first sensing line, a second sensing line, a third sensing line, a first communication part and a second communication part. The touchpad is located over the base plate. The magnetic board is arranged between the touchpad and the magnet. The first sensing line, the second sensing line and the third sensing line of the magnetic board are in parallel with each other and stacked on each other. The first sensing line is electrically connected with the second sensing line through the first communication part. The second sensing line is electrically connected with the third sensing line through the second communication part. The first sensing line, the second sensing line and the third sensing line sense a magnetic field of the magnet and generates a vibration.Type: GrantFiled: May 31, 2023Date of Patent: May 14, 2024Assignee: PRIMAX ELECTRONICS LTD.Inventors: Hung-Wei Kuo, Tse-Ping Kuan, Ying-Yen Huang, Wei-Chiang Huang
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Patent number: 11984323Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.Type: GrantFiled: July 12, 2021Date of Patent: May 14, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Te-Chien Hou, Yu-Ting Yen, Cheng-Yu Kuo, Chih Hung Chen, William Weilun Hong, Kei-Wei Chen
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Publication number: 20240154452Abstract: A charging circuitry includes a power electronic converter, a current sensor, a voltage boost/buck controller and a charging mode controller. The power electronic converter is configured to charge or discharge a supercapacitor according to a control command. The current sensor is coupled to the supercapacitor for detecting a first sensed voltage and a second sensed voltage. The voltage boost/buck controller is configured to generate the control command and a current command according to the first and second sensed voltages and an overall feedback. The charging mode controller is configured to generate a current feedback and a voltage feedback to the voltage boost/buck controller according to a driving voltage, the current command and a third sensed voltage of the supercapacitor. The third sensed voltage, the current feedback and the voltage feedback are superposed as the overall feedback and then inputted to the same input terminal of the voltage boost/buck converter.Type: ApplicationFiled: March 8, 2023Publication date: May 9, 2024Inventors: Si-Wei CHEN, Wen-Hao KUO
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Publication number: 20240155120Abstract: Implementations of the disclosure provide video processing systems and methods. The video processing method may include receiving, by one or more processors, a video frame of a video for in-loop filtering. For a target pixel of the video frame, the video processing method may further include selecting, by the one or more processors, a bilateral filtering window to perform the in-loop filtering on the target pixel from a group of candidate filtering windows. The group of candidate filtering windows include a plurality of side filtering windows and a full filtering window. The video processing method may also include filtering, by the one or more processors, the target pixel of the video frame using the selected bilateral filtering window.Type: ApplicationFiled: December 22, 2023Publication date: May 9, 2024Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.Inventors: Ning YAN, Xiaoyu Xiu, Che-Wei KUO, Wei CHEN, Yi-Wen Chen, Hong-Jheng Jhu, Xianglin Wang, Bing Yu