Patents by Inventor Wei Liu

Wei Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240167138
    Abstract: A low-carbon and low-alloy dual-phase steel and hot-dip galvanized dual-phase steel having tensile strength greater than or equal to 980 MPa and a method for manufacturing by means of rapid heat treatment. The steel has the following chemical components in percentage by mass: C: 0.05-0.17%, Si: 0.1-0.7%, Mn: 1.4-2.8%, P?0.020%, S?0.005%, B?0.005%, and Al: 0.02-0.055%, and may further contain two or more of Nb, Ti, Cr, Mo, and V, Cr+Mo+Ti+Nb+V?1.1%, the balance is Fe and other inevitable impurities. The method for manufacturing the steel comprises: smelting, casting, hot rolling, cold rolling and rapid heat treatment procedures. According to the present invention, the recovery, recrystallization and austenite transformation process of a deformed structure is changed, the nucleation rate is increased, the grain growth time is shortened, grains are refined, the strength of the material is improved, and the performance range of the material is expanded.
    Type: Application
    Filed: March 31, 2022
    Publication date: May 23, 2024
    Applicant: BAOSHAN IRON & STEEL CO., LTD.
    Inventors: Jian WANG, Jun LI, Liyang ZHANG, Huafei LIU, Junfei WANG, Xiaofeng DU, Wei XIONG, Baoping ZHANG, Fengzhi LU, Zhanhong MAO, Chuang GUAN
  • Publication number: 20240166795
    Abstract: A xylylene diisocynate composition, a preparation method therefor and the use thereof. The xylylene diisocynate composition includes xylylene diisocynate and 0.2-500 ppm of a compound represented by formula (1). A resin prepared from the provided xylylene diisocynate composition has an excellent discoloration resistance and can effectively inhibit yellowing and/or white turbidity thereof.
    Type: Application
    Filed: March 10, 2022
    Publication date: May 23, 2024
    Applicant: WANHUA CHEMICAL GROUP CO., LTD.
    Inventors: Fulin ZHU, Yonghua SHANG, Jianfeng LI, Weijie LIU, Peng WANG, Wenbin LI, Pengfei WANG, Qian WU, Wei LIU, Yuan LI
  • Publication number: 20240169947
    Abstract: A display substrate includes a base substrate, a plurality of photosensitive transistor units, a plurality of photosensitive ESD protection units, and at least one common signal line. The base substrate includes a display region, a peripheral region located at a periphery of the display region, and a binding region located at a side of the display region. The plurality of photosensitive transistor units, the plurality of photosensitive ESD protection units and the at least one common signal line are located in the peripheral region. The plurality of photosensitive transistor units is connected with binding pins in the binding region through a plurality of signal lines. At least one photosensitive ESD protection unit is connected with, and located between, at least one signal line and the common signal line.
    Type: Application
    Filed: June 23, 2021
    Publication date: May 23, 2024
    Inventors: Zhengri LIN, Wenchao HAN, Xinle WANG, Yifan SONG, Wanzhi CHEN, Jing LIU, Wei SUN, Rui LIU, Xin DUAN, Zhaohui MENG, Mingming WANG, Lianghao ZHANG, Jiantao LIU
  • Publication number: 20240170503
    Abstract: An array substrate, a liquid crystal display panel and a display apparatus. The array substrate comprises: a substrate (10), a first insulating layer (20), a second insulating layer (30), a third insulating layer (40), a planarization layer (50), a first electrode layer (90A), a fourth insulating layer (70) and a second electrode layer (90B), the third insulating layer comprises a first interlayer insulating layer (40A), a second interlayer insulating layer (40B) and a third interlayer insulating layer (40C), which are sequentially stacked; the first interlayer insulating layer is located on the side of the second interlayer insulating layer close to the substrate (10), the third interlayer insulating layer is located on the side of the second interlayer insulating layer away from the substrate; the material of the first interlayer insulating layer and third interlayer insulating layer comprises silicon oxide, the material of the second interlayer insulating layer comprises silicon nitride.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 23, 2024
    Inventors: Haoyi XIN, Wei LI, Yanfeng LI, Jingjing XU, Min ZHANG, Rui FAN, Chenrong QIAO, Xiao YAN, Zhao LIU, Jing LI, Jianxiong FAN, Shangpeng LIU, Haidong SU
  • Publication number: 20240169463
    Abstract: A computing system including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer included in an MoE model. The processing devices are configured to, in each of a plurality of iterations, at each of the processing devices, receive a respective plurality of input tokens. Executing the MoE layer further includes, at each of the processing devices, selecting one or more destination expert sub-models associated with the input tokens. Respective numbers k of expert sub-models selected differ across the iterations. At each of the processing devices, executing the MoE layer further includes conveying the input tokens to the one or more destination expert sub-models. Executing the MoE layer further includes generating one or more respective expert sub-model outputs at the one or more destination expert sub-models. Executing the MoE layer further includes generating and outputting an MoE layer output based on the one or more expert sub-model outputs.
    Type: Application
    Filed: November 10, 2022
    Publication date: May 23, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Yifan XIONG, Changho HWANG, Wei CUI, Ziyue YANG, Ze LIU, Han HU, Zilong WANG, Rafael Omar SALAS, Jithin JOSE, Prabhat RAM, Ho-Yuen CHAU, Peng CHENG, Fan YANG, Mao YANG, Yongqiang XIONG
  • Publication number: 20240170263
    Abstract: Embodiments of the present disclosure generally relate to inductively coupled plasma sources, plasma processing apparatus, and independent temperature control of plasma processing. In at least one embodiment, a method includes introducing a process gas into a gas injection channel and generating an inductively coupled plasma within the gas injection channel. The plasma includes at least one radical species selected from oxygen, nitrogen, hydrogen, NH and helium. The method includes delivering the plasma from the plasma source to a process chamber coupled therewith by flowing the plasma through a separation grid between the plasma source and a substrate. The method includes processing the substrate. Processing the substrate includes contacting the plasma including the at least one radical species with a first side of the substrate facing the separation grid and heating the substrate using a plurality of lamps located on a second side of the substrate opposite the separation grid.
    Type: Application
    Filed: November 28, 2023
    Publication date: May 23, 2024
    Inventors: Wei LIU, Vladimir NAGORNY, Rene GEORGE
  • Publication number: 20240172415
    Abstract: In certain aspects, a semiconductor device includes a vertical transistor, a metal bit line, and a pad layer. The vertical transistor includes a semiconductor body extending in a first direction, and a gate structure coupled to at least one side of the semiconductor body. The gate structure includes a gate dielectric and a gate electrode. The metal bit line extends in a second direction perpendicular to the first direction and coupled to a terminal of the vertical transistor via an ohmic contact. The pad layer is positioned between the gate electrode and the metal bit line in the first direction. The gate dielectric and the pad layer have different dielectric materials.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 23, 2024
    Inventors: Hongbin ZHU, Weihua CHENG, Wei LIU, Wenyu HUA, Bingjie YAN, Zichen LIU
  • Publication number: 20240171049
    Abstract: An electronic oil pump includes a stator assembly, a circuit board assembly, and a pump housing. The pump housing is at least partially conductive, and at least one of a stator core of the stator assembly and a reference formation of the circuit board assembly is electrically connected to the conductive portion in the pump housing. The electronic oil pump further comprises a conduction member, the conduction member is fixedly connected or limited to the pump housing, a portion of the conduction member is electrically connected to the conductive portion in the pump housing, and at least a portion of the outer surface of the remaining portion of the conduction member forms a portion of the outer surface of the electronic oil pump.
    Type: Application
    Filed: March 30, 2022
    Publication date: May 23, 2024
    Applicant: ZHEJIANG SANHUA AUTOMOTIVE COMPONENTS CO., LTD.
    Inventors: Lili LIU, Wei YE, Yao GUO, Fangxu QIAN
  • Patent number: 11988655
    Abstract: A combined platform for testing fireproof materials for cables includes a main frame for providing operating space; an air circulation system including a fresh air supply unit for supplying fresh air into the operating space and an exhaust gas treatment unit for treating the gas in the operating space under set conditions; an open flame system for providing an open flame for testing cables; a water circulation system for supplying water at least to the exhaust gas treatment unit and the operating space; and a control system for collecting at least the temperature and gas concentration in the operating space, and performing process control based on the collected results. The actual working conditions of scenarios such as fire-resistant cable tunnels and fire-resistant cable trenches can be simulated, and multiple tests such as combustion performance test and physical and chemical performance test can be carried out under various working conditions.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 21, 2024
    Assignee: STATE GRID JIANGSU ELECTRIC POWER COMPANY RESEARCH INSTITUTE
    Inventors: Chenying Li, Jie Chen, Xiao Tan, Yijun Fei, Wei Zhang, Jingying Cao, Yang Liu, Qiang Wu, Jinggang Yang, Qiang Huang, Rong Sun, Jian Liu, Hongze Li, Liguo Liu
  • Patent number: 11989090
    Abstract: Disclosed in the present invention are a method and a system for ensuring the failure atomicity in a non-volatile memory, which belong to the field of computer storage.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: May 21, 2024
    Assignee: HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Wei Tong, Dan Feng, Jingning Liu, Xueliang Wei, Weilin Zhu
  • Patent number: 11990964
    Abstract: Apparatuses, methods, and systems are disclosed for channel state information report calculation. One method (700) includes receiving (702) configuration information for multiple channel state information reference signal resources. The method (700) includes determining (704) two channel state information reference signal resources of the multiple channel state information reference signal resources to be used for calculating a channel state information report. The two channel state information reference signal resources are received from different transmission reception points, different panels, or a combination thereof. In certain embodiments, the method (700) includes transmitting (706) the channel state information report calculated based on the two channel state information reference signal resources.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: May 21, 2024
    Assignee: Lenovo (Beijing) Limited
    Inventors: Chenxi Zhu, Bingchao Liu, Wei Ling
  • Patent number: 11991496
    Abstract: A display panel, a fabricating method and a control method thereof and a display device are provided. Display panel includes a display assembly and sound generation assemblies. Display assembly includes a display assembly substrate and pixel components disposed on a side of display assembly substrate. Each sound generation assembly includes a vibrating membrane, an exciter, and a support structure. Support structure is disposed on a side of vibrating membrane and has a cavity. Exciter includes a motion part in contact with vibrating membrane and a drive part disposed in cavity. Drive part drives motion part to vibrate, and motion part vibrates to drive vibrating membrane to vibrate. Display assembly substrate and vibrating membrane are the same structure, and pixel components are disposed on a side of vibrating membrane facing away from support structure. Display device includes the display panel above.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: May 21, 2024
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yaqian Ji, Xue Dong, Wei Sun, Yingming Liu, Wenchao Han, Xiaoliang Ding, Xiufeng Li, Yanling Han, Lianghao Zhang, Chenyang Zhang, Yuzhen Guo, Peixiao Li, Yue Gou
  • Patent number: 11989304
    Abstract: A secure multi-Basic Input/Output System (BIOS)-image system includes a BIOS storage system having a first BIOS storage region and a second BIOS storage region. A first BIOS image is stored in the first BIOS storage region and is configured to utilize a plurality of initialization drivers during a first initialization process. A BIOS subsystem is coupled to the BIOS storage system. The BIOS subsystem receives second BIOS storage region write-enablement information and, in response, enables writing to the second BIOS storage region. Subsequent to enabling writing to the second BIOS storage region, the BIOS subsystem writes a second BIOS image to the second BIOS storage region. The BIOS subsystem may then use the second BIOS image that was written to the second BIOS storage region to perform a second initialization process that utilizes a subset of the plurality of initialization drivers.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: May 21, 2024
    Assignee: Dell Products L.P.
    Inventors: Wei Liu, Alberto David Perez Guevara
  • Patent number: 11991767
    Abstract: A Bluetooth communication system includes: a Bluetooth host device; and a Bluetooth device set which including a first member device and a second member device. The first member device is arranged to operably transmit a corresponding first device information to the Bluetooth host device. The second member device is arranged to operably transmit a corresponding second device information to the Bluetooth host device. The Bluetooth host device is arranged to operably control a display device to simultaneously display a first device item for representing the first member device and a second device item for representing the second member device in a graphical user interface. The Bluetooth host device is further arranged to operably establish a Bluetooth connection with the first member device and conduct pairing procedure with the first member device after receiving a selection command corresponding to the first member device.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: May 21, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Qing Gu, Bi Wei, Yu Hsuan Liu, Yung Chieh Lin, Cheng Cai, Sixian Wang
  • Patent number: 11990522
    Abstract: A semiconductor structure includes a substrate and a semiconductor channel layer over the substrate. The semiconductor structure includes a high-k gate dielectric layer over the semiconductor channel layer, a work function metal layer over the high-k gate dielectric layer, and a bulk metal layer over the work function metal layer. The work function metal layer includes a first portion and a second portion over the first portion. Both the first portion and the second portion are conductive. Materials included in the second portion are also included in the first portion. The first portion is doped with silicon at a first dopant concentration, and the second portion is not doped with silicon or is doped with silicon at a second dopant concentration lower than the first dopant concentration.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Tien Tung, Szu-Wei Huang, Zhi-Ren Xiao, Yin-Chuan Chuang, Yung-Chien Huang, Kuan-Ting Liu, Tzer-Min Shen, Chung-Wei Wu, Zhiqiang Wu
  • Patent number: 11987566
    Abstract: The present invention provides a novel compound for effectively preventing nerve damage and protecting nerves, and a preparation method thereof. Besides, the present invention also provides a pharmaceutical composition comprising the novel compound, and a use of the novel compound for preventing nerve damage and protecting nerves.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: May 21, 2024
    Assignee: GENHEALTH PHARMA CO., LTD.
    Inventors: Lain-Tze Lee, Hui-Ping Tsai, Yi-Wen Lin, Shu-Fen Huang, Shih-Hung Liu, Chin-Wei Liu, Pi-Tsan Huang, Mei-Hui Chen
  • Patent number: 11988222
    Abstract: A flexible guide vane structure of a mixed flow pump with adjustable flow area, a mixed flow pump and an adjustment method are provided. The flexible guide vane structure includes a flexible guide vane and a flexible guide vane adjusting device. The flexible guide vane adjusting device includes a support rib, a support rib base and a base driving mechanism. As the skeleton of the flexible guide vane, the support rib realizes the shape change of the flexible vane through the base driving mechanism and the support rib base. In the mixed flow pump, the flexible guide vane adjusting device is installed inside the blade hub. Through the flow section feedback regulation system, the angle of the support rib is adjusted based on the real-time working condition of the mixed flow pump to adjust the flow area of the blade and achieve the best working condition.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: May 21, 2024
    Assignee: JIANGSU UNIVERSITY
    Inventors: Wei Li, Leilei Ji, Dong Liu, Dele Lu, Shuo Li, Yi Yang
  • Patent number: 11988068
    Abstract: The invention relates to the technical field of oil and gas field development, in particular to a staged multi-cluster fracturing sliding sleeve system and method based on smart key label. The system includes at least one multi-cluster sliding correspondingly placed in each fracturing stage, an end sliding sleeve, and a smart key label. The method includes: step S1, performing fracturing stage by stage from a first stage to a last stage, placing the smart key label through a wellhead and pumping the smart key label to the target fracturing stage; step S2, opening the multi-cluster sliding sleeves of the current fracturing stage one by one through the smart key label, and finally blocking the smart key label in the end sliding sleeve when the multi-cluster sliding sleeve and the end sliding sleeve of the current fracturing stage are opened; and step S3, repeating the steps S1 and S2 until the fracturing operations of all the stages are completed.
    Type: Grant
    Filed: October 27, 2023
    Date of Patent: May 21, 2024
    Inventors: Wenping Song, Jiuzheng Yu, Qiao Sun, Duoli Zhang, Tao Ma, Jiaqing Zhang, Hao Yu, Pengyu Li, Wei Liu
  • Patent number: 11988696
    Abstract: Provided is a method for analyzing the stability of a PMSG-WT connected to a weak power grid considering the influence of power control. New energy power generation mostly uses a perturbation and observation (P&O) method for maximum power point tracking, and nonlinear discontinuous links therein make stability analysis difficult. The present application analyzes the stability of the PMSG-WT connected to the weak grid system based on a describing function method, and fully considers the nonlinear discontinuous links in the power loop, thus making the analysis result more accurate. At the same time, the describing function method is a method that can quantitatively calculate the frequency and amplitude of oscillation. The analysis method of the present application can provide a powerful and good reference for oscillation suppression and controller design.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: May 21, 2024
    Assignee: ZHEJIANG UNIVERSITY
    Inventors: Miao Yu, Jianing Liu, Lingxia Lu, Wei Wei
  • Patent number: 11989174
    Abstract: Disclosed herein are systems and methods for intelligent generation and display of insights using information in a data repository. For example, disclosed herein are methods for generating and displaying insights using initial data from a data repository, and intelligently/automatically proposing, generating, and displaying further insights using previously-generated insights.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: May 21, 2024
    Assignee: MICROSTRATEGY INCORPORATED
    Inventors: Yingchun Mei, Xiaodi Zhong, Jiacheng Li, Wei Jiang, Shu Liu, Lina Zhang, En Li