Patents by Inventor Wei-Ming Wu

Wei-Ming Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240170299
    Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.
    Type: Application
    Filed: January 30, 2024
    Publication date: May 23, 2024
    Inventors: KUN-JU LI, ANG CHAN, HSIN-JUNG LIU, WEI-XIN GAO, JHIH-YUAN CHEN, CHUN-HAN CHEN, ZONG-SIAN WU, CHAU-CHUNG HOU, I-MING LAI, FU-SHOU TSAI
  • Patent number: 11982798
    Abstract: A projection lens includes a first lens group, a second lens group and an aperture stop. The first lens group is disposed between a reduced side and a magnified side. The second lens is disposed between the first lens group and the magnified side. The second lens group has a light incident surface, a reflective surface and a light emitting surface, the light incident surface faces the first lens group, the light emitting surface faces a projection surface, the light incident surface, the light emitting surface and the first lens group are disposed at a single side of the reflective surface, and at least one of the light incident surface, the reflective surface and the light emitting surface is a freeform surface. The aperture stop is disposed between the first lens group and the second lens group. Moreover, a projection apparatus including the projection lens is also provided.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: May 14, 2024
    Assignee: Coretronic Corporation
    Inventors: Hsin-Hsiang Lo, Wei-Ting Wu, Fu-Ming Chuang, Chuan-Chung Chang, Ching-Chuan Wei
  • Publication number: 20240145571
    Abstract: In some embodiments, the present disclosure relates to an integrated circuit (IC) in which a memory structure comprises an inhibition layer inserted between two ferroelectric layers to create a tetragonal-phase dominant ferroelectric structure. In some embodiments, the ferroelectric structure includes a first ferroelectric layer, a second ferroelectric layer overlying the first ferroelectric layer, and a first inhibition layer disposed between the first and second ferroelectric layers and bordering the second ferroelectric layer. The first inhibition layer is a different material than the first and second ferroelectric layers.
    Type: Application
    Filed: January 5, 2023
    Publication date: May 2, 2024
    Inventors: Po-Ting Lin, Yu-Ming Hsiang, Wei-Chih Wen, Yin-Hao Wu, Wu-Wei Tsai, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Publication number: 20240136217
    Abstract: A manufacturing system includes a substrate disposed on a conveyer system. The conveyer system includes a pair of side supports. The substrate is moved on the conveyer system until the substrate is disposed over a bottom support block. The bottom support block is raised to physically contact the substrate. A transfer arm module is provided. The transfer arm module includes a flat bottom surface and an opening formed in the flat bottom surface. The transfer arm module is disposed with the flat bottom surface physically contacting the substrate opposite the bottom support block. A vacuum is enabled through the opening of the transfer arm module. The substrate is lifted off the bottom support block using the vacuum. The substrate is moved over a printing pallet using the transfer arm module. The vacuum is disabled when the substrate is in a positioning area of the printing pallet.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Applicant: UTAC Headquarters Pte. Ltd.
    Inventors: Hua Hong Tan, Chee Kay Chow, Zong Xiang Cai, Wei Ming Xian, Yao Hong Wu, Wing Keung Lam
  • Patent number: 11945004
    Abstract: A semiconductor manufacturing equipment cleaning system has a multi-station cleaning and inspection system. Within semiconductor manufacturing equipment cleaning system, a tray cleaning station uses a first rotating brush passing over a first surface of a carrier and possibly semiconductor die, and a second rotating brush passing over a second surface of the carrier and semiconductor die opposite the first surface of the carrier and semiconductor die. Debris and contaminants dislodged from the first surface and second surface of the carrier by the first rotating brush and second rotating brush are removed under vacuum suction. A conveyor transports the carrier through the multi-station cleaning and inspection system. The first rotating brush and second rotating brush move in tandem across the first surface and second surface of the carrier. Air pressure is injected across the first rotating brush and second rotating brush to further remove debris and contaminants.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: April 2, 2024
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Hua Hong Tan, Wing Keung Lam, Zong Xiang Cai, Wei Ming Xian, Yao Hong Wu, Tao Hu
  • Publication number: 20240095868
    Abstract: A watermark embedding method includes the following steps. The input video signal is received by a processing circuit. Grayscale information of a watermark signal is generated by the processing circuit according to a time series data and a predetermined plane. During a dark sate and a bright state in each of a plurality of consecutive periods, phases of the time series data are opposite and integral values of the grayscales of the predetermined plane are the same. The processing circuit embeds the watermark signal into the input video signal to generate an output video signal with the watermark information. The display panel displays an image according to the output video signal.
    Type: Application
    Filed: December 28, 2022
    Publication date: March 21, 2024
    Inventors: Yang-En WU, Wen-Rei GUO, Wei-Ming CHENG, Chao-Wei LI
  • Patent number: 11923205
    Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: March 5, 2024
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kun-Ju Li, Ang Chan, Hsin-Jung Liu, Wei-Xin Gao, Jhih-Yuan Chen, Chun-Han Chen, Zong-Sian Wu, Chau-Chung Hou, I-Ming Lai, Fu-Shou Tsai
  • Patent number: 11916077
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Patent number: 11304320
    Abstract: Examples of providing access to a switch of an electronic device are described herein. In an example, a housing of the electronic device includes a sidewall having an opening to receive an external actuator to access a switch of the electronic device. The housing further includes a first bracket and a second bracket, both movably coupled to the sidewall. The first bracket includes an actuator opening, which when aligned with the opening of the sidewall, allows the external actuator to access the switch. Further, the second bracket is moveable to co-operate with the first bracket to align the actuator opening with the opening to provide access to the switch.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: April 12, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Wei-Ming Wu
  • Publication number: 20210400826
    Abstract: Examples of providing access to a switch of an electronic device are described herein. In an example, a housing of the electronic device includes a sidewall having an opening to receive an external actuator to access a switch of the electronic device. The housing further includes a first bracket and a second bracket, both movably coupled to the sidewall. The first bracket includes an actuator opening, which when aligned with the opening of the sidewall, allows the external actuator to access the switch. Further, the second bracket is moveable to co-operate with the first bracket to align the actuator opening with the opening to provide access to the switch.
    Type: Application
    Filed: October 20, 2016
    Publication date: December 23, 2021
    Inventor: WEI-MING WU
  • Publication number: 20200217105
    Abstract: In an example, an enclosure lock may include a lock port disposed in a device enclosure, the lock port to receive a device lock. The enclosure lock may also include a lock latch, which may be disposed within such a device enclosure. The lock latch may be movable from a released position to a locked position by the device lock if the device lock is engaged with the lock port. The lock latch may engage with an enclosure ledge of the device enclosure if the lock latch is disposed in the locked position such that the device enclosure is not able to be disassembled.
    Type: Application
    Filed: August 31, 2017
    Publication date: July 9, 2020
    Inventor: WEI-MING WU
  • Publication number: 20190379811
    Abstract: A camera module includes a base and at least one camera unit. The camera unit is mounted on the base, and the camera unit includes a circuit substrate, an image sensor, a lens assembly, a circuit board, a plurality of metal wires. The circuit substrate is rectangular, and has four edges and a plurality of first pads. The first pads are located along two adjacent edges of the circuit substrate. The image sensor and the lens assembly are mounted on the circuit substrate. The circuit board has two notched edges and a plurality of second pads. The second pads are located along the two notched edges of the circuit board. The second pads correspond to the first pads. Each second pad is connected to a corresponding first pad by one of the metal wires. The camera module uses wire bonding to connect the circuit substrate to the circuit board.
    Type: Application
    Filed: June 3, 2019
    Publication date: December 12, 2019
    Inventors: LU-QING MENG, WEI-MING WU, CHEN-KUANG YEH, XU-GUO YANG
  • Patent number: 8862525
    Abstract: A method for screening samples for building a prediction model and a computer program product thereof are provided. When a set of new sample data is added to a dynamic moving window (DMW), a clustering step is performed with respect to all of the sets of sample data within the window for grouping the sets of sample data with similar properties as one group. If the number of the sets of sample data in the largest group is greater than a predetermined threshold, it means that there are too many sets of sample data with similar properties in the largest group, and the oldest sample data in the largest group can be deleted; if smaller than or equal to a predetermined threshold, it means that the sample data in the largest group are quite unique, and should be kept for building or refreshing the prediction model.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: October 14, 2014
    Assignee: National Cheng Kung University
    Inventors: Fan-Tien Cheng, Wei-Ming Wu
  • Publication number: 20140222376
    Abstract: A method for searching, analyzing, and optimizing process parameters and a computer product thereof are provided. At first, sets of process data that are generated when a process tool processes workpieces are obtained respectively, each set of process data including process parameters. Then, sets of metrology data measured by a metrology tool are obtained, wherein the sets of metrology data are corresponding to the sets of the process data in a one-to-one manner, each workpiece having at least one measurement point, each set of metrology data including at least one actual measurement value of at least one measurement item at the at least one measurement point. Thereafter, critical parameters are selected from the process parameters. Then, values of the critical parameters are adjusted to enable predicted measurement values of the measurement points of one workpiece to meet a quality target value.
    Type: Application
    Filed: March 19, 2013
    Publication date: August 7, 2014
    Applicants: NATIONAL CHENG KUNG UNIVERSITY, FORESIGHT TECHNOLOGY COMPANY, LTD.
    Inventors: Chi-An KAO, Chih-Hsuan CHENG, Wei-Ming WU, Fan-Tien CHENG
  • Patent number: 8688256
    Abstract: An advanced process control (APC) system, an APC method, and a computer program product, which, when executed, performs an APC method are provided for incorporating virtual metrology (VM) into APC. The present inventions uses a reliance index (RI) and a global similarity index (GSI) to adjust at least one controller gain of a run-to-run (R2R) controller when the VM value of a workpiece is adopted to replace the actual measurement value of the workpiece. The RI is used for gauging the reliability of the VM value, and the GSI is used for assessing the degree of similarity between the set of process data for generating the VM value and all the sets of historical process data used for building the conjecturing model.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: April 1, 2014
    Assignees: National Cheng Kung University, Foresight Technology Company, Ltd.
    Inventors: Fan-Tien Cheng, Chi-An Kao, Wei-Ming Wu
  • Patent number: 8413025
    Abstract: A method of handling packet loss uses error-correcting codes and block rearrangement. This method divides the original data stream into data blocks, then codes the blocks by error-correcting codes. After coding the blocks, rearranges the coding blocks for spreading original data into new blocks and then transmitting the new blocks. After receiving the transmitted blocks, reverse-rearrangs the received blocks and decode the blocks. Combine the decoded blocks into original data stream in the end.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: April 2, 2013
    Assignee: National Chung Cheng University
    Inventors: Huan Chen, Hsi-Hsun Yeh, Wei-Ming Wu
  • Patent number: 8360382
    Abstract: The present invention provides a stand assembly for supporting an electronic device. The stand assembly includes a main stand member and an auxiliary stand member. The main stand member includes a first stand and a second stand. The first stand is pivotally connected to the electronic device. The second stand is pivotally connected to the first stand and capable of sliding relative to the electronic device. The auxiliary stand member is pivotally connected to the electronic device.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: January 29, 2013
    Assignee: Pegatron Corporation
    Inventors: Wei-Ming Wu, Ker-How Lu
  • Publication number: 20120029662
    Abstract: An advanced process control (APC) system, an APC method, and a computer program product, which, when executed, performs an APC method are provided for incorporating virtual metrology (VM) into APC. The present inventions uses a reliance index (RI) and a global similarity index (GSI) to adjust at least one controller gain of a run-to-run (R2R) controller when the VM value of a workpiece is adopted to replace the actual measurement value of the workpiece. The RI is used for gauging the reliability of the VM value, and the GSI is used for assessing the degree of similarity between the set of process data for generating the VM value and all the sets of historical process data used for building the conjecturing model.
    Type: Application
    Filed: July 29, 2011
    Publication date: February 2, 2012
    Applicants: FORESIGHT TECHNOLOGY COMPANY, LTD., NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Fan-Tien CHENG, Chi-An KAO, Wei-Ming WU
  • Publication number: 20110283168
    Abstract: A method of handling packet loss uses errorcorrecting codes and block rearrangement. This method divides the original data stream into data blocks, then codes the blocks by errorcorrecting codes. After coding the blocks, rearranges the coding blocks for spreading original data into new blocks and then transmitting the new blocks. After receiving the transmitted blocks, reverserearrangs the received blocks and decode the blocks. Combine the decoded blocks into original data stream in the end.
    Type: Application
    Filed: August 20, 2010
    Publication date: November 17, 2011
    Applicant: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Huan Chen, Hsi-Hsun Yeh, Wei-Ming Wu